Reputation:
acer aspire 5340 5740 5740g wistron jv50-cp rev sb schematic 1
Technical Specifications
Technical Summary
The Wistron JV50-CP motherboard, project code 91.4GD01.001, revision SB, dated August 27, 2009, is built around the Intel Arrandale or Clarksfield CPU platform with an Intel PCH. Graphics are handled by an ATI Madison or Park GPU via PCI Express Graphics. The system uses an NPCE781B EC/KBC and an ALC272 audio codec. BIOS is stored on a 4MB Flash ROM. Power management includes an ISL88731A charger and multiple DC/DC converters such as the TPS51117, RT9025, ISL62881, ISL62882, and TPS51123. Memory configuration supports DDRIII 800/1066/1333 across two slots in Channel A and Channel B. Connectivity features include a BCM57780 Gigabit LAN controller, an AU6433 card reader, and WLAN via Mini-Card. Thermal monitoring is provided by a G78739 sensor.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an NPCE781B.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 4MB Flash ROM.
Q: What is the charging IC and architecture?
A: The charging IC is an ISL88731A, operating on the DCBATOUT architecture.
Q: What memory type and configuration does this board support?
A: It supports DDRIII 800/1066/1333 in a dual-channel configuration across Slot 0 and Slot 1.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Wistron Corporation |
| Project Code | 91.4GD01.001 |
| Board Number | JV50-CP |
| Revision | SB |
| Date | Thursday, August 27, 2009 |
| CPU Platform | Intel Arrandale / Clarksfield |
| PCH / Southbridge | Intel PCH |
| GPU Type | ATI Madison or Park |
| Graphics Architecture | PCI Express Graphics |
| EC / KBC | NPCE781B |
| Audio Codec | ALC272 |
| BIOS / SPI Flash | 4MB Flash ROM |
| Charging IC | ISL88731A |
| Charger Architecture | DCBATOUT |
| Power IC(s) | TPS51117, RT9025, ISL62881, ISL62882, TPS51123 |
| RAM Type | DDRIII |
| RAM Architecture | DDRIII 800/1066/1333, Channel A, Channel B |
| RAM Quantity / Slots | Slot 0, Slot 1 |
| Thermal Sensor | G78739 |
| Card Reader IC | AU6433 |
| LAN IC | BCM57780 |
| WiFi / WLAN IC | WLAN (Mini-Card) |
| HDMI Level Shifter | Digital Display (HDMI) |
Technical Summary
The Wistron JV50-CP motherboard, project code 91.4GD01.001, revision SB, dated August 27, 2009, is built around the Intel Arrandale or Clarksfield CPU platform with an Intel PCH. Graphics are handled by an ATI Madison or Park GPU via PCI Express Graphics. The system uses an NPCE781B EC/KBC and an ALC272 audio codec. BIOS is stored on a 4MB Flash ROM. Power management includes an ISL88731A charger and multiple DC/DC converters such as the TPS51117, RT9025, ISL62881, ISL62882, and TPS51123. Memory configuration supports DDRIII 800/1066/1333 across two slots in Channel A and Channel B. Connectivity features include a BCM57780 Gigabit LAN controller, an AU6433 card reader, and WLAN via Mini-Card. Thermal monitoring is provided by a G78739 sensor.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an NPCE781B.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 4MB Flash ROM.
Q: What is the charging IC and architecture?
A: The charging IC is an ISL88731A, operating on the DCBATOUT architecture.
Q: What memory type and configuration does this board support?
A: It supports DDRIII 800/1066/1333 in a dual-channel configuration across Slot 0 and Slot 1.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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