acer aspire e5-575 quanta zaa x32
Technical Specifications
Technical Summary
This Quanta ZAAS project motherboard is built around the Intel Skylake-U (SKL_ULT) platform with an integrated PCH and a GT3e graphics core in an MCP 1356-pin package. The system memory architecture consists of dual-channel DDR4 supported by two DDR4-SODIMM slots. The embedded controller is an IT8987, and the audio subsystem is handled by an ALC255 codec. The BIOS is stored on an SPI ROM with a combined 8M+4M capacity. Power management is managed by a BQ24780S battery charger and an RT6575AGQW regulator. The board integrates an RTL8411B controller for both 10/100/1G LAN and card reader functions. Display connectivity includes an HDMI port driven through a PTN3366BSP level shifter and an eDP interface. Wireless connectivity is provided via a Mini Card WLAN+BT module.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The BIOS is stored on an SPI ROM with a combined capacity of 8M+4M.
Q: What embedded controller is used on this motherboard?
A: The embedded controller is an IT8987.
Q: What is the charging IC and architecture on this motherboard?
A: The charging IC is a BQ24780S, configured as a battery charger.
Q: What is the memory architecture on this motherboard?
A: The memory architecture is dual-channel DDR4, supported by two DDR4-SODIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta Computer Inc. |
| Project Code | ZAAS |
| Revision | 1A |
| Date | Monday, March 28, 2016 |
| CPU Platform | SkyLake-U |
| CPU Model | SKL_ULT |
| CPU Package | MCP 1356pins |
| PCH / Southbridge | Integrated PCH |
| GPU Type | GT3e |
| Graphics Architecture | IMC |
| EC / KBC | IT8987 |
| Audio Codec | ALC255 |
| BIOS / SPI Flash | SPI ROM 8M+4M |
| Charging IC | BQ24780S |
| Charger Architecture | Batery Charger |
| Power IC(s) | RT6575AGQW |
| RAM Type | DDR4 |
| RAM Architecture | Dual Channel DDR4 |
| RAM Quantity / Slots | DDR4-SODIMM CHA, DDR4-SODIMM CHB |
| Card Reader IC | RTL8411B |
| LAN IC | RTL8411B |
| WiFi / WLAN IC | MINI CARD WLAN+BT |
| HDMI Level Shifter | PTN3366BSP |
Technical Summary
This Quanta ZAAS project motherboard is built around the Intel Skylake-U (SKL_ULT) platform with an integrated PCH and a GT3e graphics core in an MCP 1356-pin package. The system memory architecture consists of dual-channel DDR4 supported by two DDR4-SODIMM slots. The embedded controller is an IT8987, and the audio subsystem is handled by an ALC255 codec. The BIOS is stored on an SPI ROM with a combined 8M+4M capacity. Power management is managed by a BQ24780S battery charger and an RT6575AGQW regulator. The board integrates an RTL8411B controller for both 10/100/1G LAN and card reader functions. Display connectivity includes an HDMI port driven through a PTN3366BSP level shifter and an eDP interface. Wireless connectivity is provided via a Mini Card WLAN+BT module.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The BIOS is stored on an SPI ROM with a combined capacity of 8M+4M.
Q: What embedded controller is used on this motherboard?
A: The embedded controller is an IT8987.
Q: What is the charging IC and architecture on this motherboard?
A: The charging IC is a BQ24780S, configured as a battery charger.
Q: What is the memory architecture on this motherboard?
A: The memory architecture is dual-channel DDR4, supported by two DDR4-SODIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Indexed motherboard components
Open a component to see every indexed schematic that uses the same part.
Indexed motherboard components
Open a component to see every indexed schematic that uses the same part.
Attachments
Last edited:
