acer none cp5-471 quanta zda rev 8a
Technical Specifications
Technical Summary
This Quanta ZDA project motherboard, board number 8A143, is built on the SKY LAKE ULT platform with a date of April 4, 2016. The system utilizes an MEC1322 embedded controller and an NAU88L25 audio codec. Memory architecture is Dual Channel LPDDR III. The BIOS is stored on a 128M SPI ROM. The board features an NGFF-WIFI/BT/DB wireless module, a GL823 card reader, and an HDMI interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is 8A143 and the project code is ZDA.
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an MEC1322.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 128M SPI ROM.
Q: What is the memory architecture?
A: The memory architecture is Dual Channel LPDDR III.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta Computer Inc. |
| Project Code | ZDA |
| Board Number | 8A143 |
| Revision | ZDA |
| Date | Monday, April 04, 2016 |
| CPU Platform | SKY LAKE ULT |
| EC / KBC | MEC1322 |
| Audio Codec | NAU88L25 |
| BIOS / SPI Flash | SPI ROM 128M |
| RAM Type | LPDDR III |
| RAM Architecture | Dual Channel LPDDR III |
| Card Reader IC | GL823 |
| WiFi / WLAN IC | NGFF-WIFI/BT/DB |
| HDMI Level Shifter | HDMI |
Technical Summary
This Quanta ZDA project motherboard, board number 8A143, is built on the SKY LAKE ULT platform with a date of April 4, 2016. The system utilizes an MEC1322 embedded controller and an NAU88L25 audio codec. Memory architecture is Dual Channel LPDDR III. The BIOS is stored on a 128M SPI ROM. The board features an NGFF-WIFI/BT/DB wireless module, a GL823 card reader, and an HDMI interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is 8A143 and the project code is ZDA.
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an MEC1322.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 128M SPI ROM.
Q: What is the memory architecture?
A: The memory architecture is Dual Channel LPDDR III.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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