Salim Badakhshan
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Acer Predator Triton 300 SE PT314-52s Quanta ZGN Rev A1A Schematic
Technical Specifications
Technical Summary
The Quanta ZGN project is an Alder Lake-P platform paired with an Alder Lake-PCH, supporting up to 32GB per SODIMM of DDR5 4800MHz memory across two channels. Graphics are handled by NVIDIA GN20-E3 Max-P, GN20-E5/E6/E7 Max-Q, or GN20-P1 Max-P with gDDR6 VRAM. The embedded controller is an IT5570, and audio is provided by an ALC3324 codec. Networking includes an E3100G LAN IC and CNVi/discrete WLAN. The system features a PI3HDX12211ZHEX HDMI re-driver, PS8811 USB hub ICs, and a CCG6 CYPD6127-48LQXI charging/PD controller. Storage supports PCIe Gen4 x4 SSDs via M.2 2280 slots. The block diagram is dated March 21, 2022, revision A1A.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an IT5570.
Q: What is the memory architecture?
A: The board supports DDR5 4800MHz across two SODIMM slots, configured as Channel A and Channel B, with a maximum of 32GB per slot.
Q: What charging/PD controller is used?
A: The charging and USB-C PD controller is a CCG6 CYPD6127-48LQXI.
Q: What audio codec is present?
A: The audio codec is an ALC3324.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta Computer Inc. |
| Project Code | ZGN |
| Document Number | ZGN Block Diagram |
| Revision | A1A |
| Date | Monday, March 21, 2022 |
| CPU Platform | Alder Lake-P |
| PCH / Southbridge | Alder Lake-PCH |
| GPU Type | NVIDIA GN20-E3 Max-P / GN20-E5/E6/E7 Max-Q / GN20-P1 Max-P |
| Graphics Architecture | gDDR6 |
| RAM Type | DDR5 4800MHz |
| RAM Architecture | Channel A / Channel B |
| RAM Quantity / Slots | 2 x SODIMM |
| EC / KBC | IT5570 |
| Audio Codec | ALC3324 |
| LAN IC | E3100G |
| WiFi / WLAN IC | CNVi / Discrete |
| HDMI Level Shifter | PI3HDX12211ZHEX |
| Card Reader IC | SD7.0 / SD3.0 |
| USB Hub IC | PS8811 QFN36 GTR2-A3 |
| Charging IC | CCG6 CYPD6127-48LQXI |
| Power IC(s) | SLGC55544CVTR |
| Thermal Sensor | G-Sensor (D5/D7) |
Technical Summary
The Quanta ZGN project is an Alder Lake-P platform paired with an Alder Lake-PCH, supporting up to 32GB per SODIMM of DDR5 4800MHz memory across two channels. Graphics are handled by NVIDIA GN20-E3 Max-P, GN20-E5/E6/E7 Max-Q, or GN20-P1 Max-P with gDDR6 VRAM. The embedded controller is an IT5570, and audio is provided by an ALC3324 codec. Networking includes an E3100G LAN IC and CNVi/discrete WLAN. The system features a PI3HDX12211ZHEX HDMI re-driver, PS8811 USB hub ICs, and a CCG6 CYPD6127-48LQXI charging/PD controller. Storage supports PCIe Gen4 x4 SSDs via M.2 2280 slots. The block diagram is dated March 21, 2022, revision A1A.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an IT5570.
Q: What is the memory architecture?
A: The board supports DDR5 4800MHz across two SODIMM slots, configured as Channel A and Channel B, with a maximum of 32GB per slot.
Q: What charging/PD controller is used?
A: The charging and USB-C PD controller is a CCG6 CYPD6127-48LQXI.
Q: What audio codec is present?
A: The audio codec is an ALC3324.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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