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Dell XPS 15 9575 LA FERRARI DAZ10 LA-F211P Rev 1.0 A00 180226A Schematic
Technical Specifications
Technical Summary
This Compal-manufactured Dell DAZ10 La Ferrari (KABY LAKE-G) motherboard, board number LA-F211P revision 1.0 (A00) dated 2018-02-26, is built around an Intel Kaby Lake-G processor with a Kaby Lake-H-PCH. The system firmware is stored on a 32MB SPI Flash BIOS. Embedded controller functionality is handled by a MEC 5105DP C-stepping IC. Audio is managed by an ALC3271 codec. The board features DDR4 memory in a down configuration with four x16 chips. Charging and PD control is provided by CY CCG5 controllers. A RTS5242 card reader IC is present, and wireless connectivity is via a WLAN+BT4.1 LGA module. DisplayPort multiplexing is handled by PS8743B ICs.
Technician FAQ
Q: What is the board number and revision for this Dell motherboard?
A: The board number is LA-F211P, revision 1.0 (A00).
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is a MEC 5105DP C-stepping.
Q: What is the BIOS flash configuration?
A: The BIOS is a 32MB SPI Flash.
Q: What is the memory architecture?
A: The memory is DDR4 in a down configuration with four x16 chips.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Model | DAZ10 La Ferrari (KABY LAKE-G) |
| Motherboard Manufacturer | Compal |
| Board Number | LA-F211P |
| Revision | 1.0 (A00) |
| Date | 2018-02-26 |
| CPU Platform | Kaby Lake-G |
| PCH / Southbridge | Kaby Lake-H-PCH |
| EC / KBC | MEC 5105DP C-stepping |
| Audio Codec | ALC3271 |
| BIOS / SPI Flash | SPI Flash (BIOS 32MB) |
| Charging IC | CY CCG5 |
| RAM Type | DDR4 |
| RAM Architecture | Memory down (x16) * 4 |
| Card Reader IC | RTS5242 |
| LAN IC | WLAN+BT4.1 (16x12mm LGA module) |
| WiFi / WLAN IC | WLAN+BT4.1 (16x12mm LGA module) |
| HDMI Level Shifter | PS8743B x2 |
Technical Summary
This Compal-manufactured Dell DAZ10 La Ferrari (KABY LAKE-G) motherboard, board number LA-F211P revision 1.0 (A00) dated 2018-02-26, is built around an Intel Kaby Lake-G processor with a Kaby Lake-H-PCH. The system firmware is stored on a 32MB SPI Flash BIOS. Embedded controller functionality is handled by a MEC 5105DP C-stepping IC. Audio is managed by an ALC3271 codec. The board features DDR4 memory in a down configuration with four x16 chips. Charging and PD control is provided by CY CCG5 controllers. A RTS5242 card reader IC is present, and wireless connectivity is via a WLAN+BT4.1 LGA module. DisplayPort multiplexing is handled by PS8743B ICs.
Technician FAQ
Q: What is the board number and revision for this Dell motherboard?
A: The board number is LA-F211P, revision 1.0 (A00).
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is a MEC 5105DP C-stepping.
Q: What is the BIOS flash configuration?
A: The BIOS is a 32MB SPI Flash.
Q: What is the memory architecture?
A: The memory is DDR4 in a down configuration with four x16 chips.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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