hp probook 450 g2 zpl40-zpl50-zpl70 la-b181p_uma_rev0.5 schematic
hp probook 450 g2=1=zpl40-zpl50-zpl70 la-b181p_uma_rev0.5.pdf
Technical Specifications
Technical Summary
This Compal LA-B181P schematic, revision 0.5 dated 2014/02/18, documents a motherboard designed around the Intel Broadwell U / Haswell CPU platform with DDR3L memory architecture supporting two 204-pin DDRIII-SO-DIMM modules. The system utilizes an SMSC MEC1322-NU embedded controller and an 8MB SYS BIOS ROM for firmware storage. Audio is handled by a Realtek ALC3227 codec, while networking is provided by a Realtek RTL8161GSH-CG Gigabit LAN controller. Graphics processing is managed by an AMD Topaz VGA solution with up to 256Mx16 DDR3 VRAM across four chips. The power delivery subsystem includes a TPS51622ARSMR charging IC alongside multiple system DC/DC converters including RT8243AZQW, RT8207MZQW, SY8206DQNC, SY8003DFC, and RT8880BGQW. A Realtek RT5237-GR card reader controller and an IT6513FN DP to VGA converter are also integrated.
Technician FAQ
Q: What is the board number and revision of this schematic?
A: The board number is LA-B181P, revision 0.5.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an SMSC MEC1322-NU.
Q: What is the BIOS flash capacity on this motherboard?
A: The system BIOS ROM is 8MB.
Q: What CPU platform does this motherboard support?
A: The platform is Intel Broadwell U / Haswell.
Q: What is the memory architecture on this motherboard?
A: The memory architecture is DDR3L using two 204-pin DDRIII-SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
hp probook 450 g2=1=zpl40-zpl50-zpl70 la-b181p_uma_rev0.5.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | LA-B181P |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | Sharkbay & Crescent bay ULT –U processor with DDR3L |
| Board Number | LA-B181P |
| Revision | 0.5 |
| Date | 2014/02/18 |
| CPU Platform | Intel Broadwell U / Haswell |
| EC / KBC | SMSC MEC1322-NU |
| Audio Codec | Realtek ALC3227 |
| BIOS / SPI Flash | SYS BIOS ROM 8MB |
| BIOS Flash Capacity | 8MB |
| LAN IC | Realtek RTL8161GSH-CG |
| Card Reader IC | RT5237-GR |
| RAM Type | DDR3L |
| RAM Architecture | 204pin DDRIII-SO-DIMM X2 |
| RAM Quantity / Slots | 2 |
| GPU Type | AMD Topaz VGA 128Mx16 / 256Mx16 DDR3 x4 VRAM |
| Graphics Architecture | AMD Topaz |
| Charging IC | TPS51622ARSMR |
| Power IC(s) | RT8243AZQW, RT8207MZQW, SY8206DQNC, SY8003DFC, RT8880BGQW |
| WiFi / WLAN IC | WLAN & BT Combo |
| HDMI Level Shifter | IT6513FN |
Technical Summary
This Compal LA-B181P schematic, revision 0.5 dated 2014/02/18, documents a motherboard designed around the Intel Broadwell U / Haswell CPU platform with DDR3L memory architecture supporting two 204-pin DDRIII-SO-DIMM modules. The system utilizes an SMSC MEC1322-NU embedded controller and an 8MB SYS BIOS ROM for firmware storage. Audio is handled by a Realtek ALC3227 codec, while networking is provided by a Realtek RTL8161GSH-CG Gigabit LAN controller. Graphics processing is managed by an AMD Topaz VGA solution with up to 256Mx16 DDR3 VRAM across four chips. The power delivery subsystem includes a TPS51622ARSMR charging IC alongside multiple system DC/DC converters including RT8243AZQW, RT8207MZQW, SY8206DQNC, SY8003DFC, and RT8880BGQW. A Realtek RT5237-GR card reader controller and an IT6513FN DP to VGA converter are also integrated.
Technician FAQ
Q: What is the board number and revision of this schematic?
A: The board number is LA-B181P, revision 0.5.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an SMSC MEC1322-NU.
Q: What is the BIOS flash capacity on this motherboard?
A: The system BIOS ROM is 8MB.
Q: What CPU platform does this motherboard support?
A: The platform is Intel Broadwell U / Haswell.
Q: What is the memory architecture on this motherboard?
A: The memory architecture is DDR3L using two 204-pin DDRIII-SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
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