Lenovo Xiaoxin AIR-14IIL 2020 FLMS0 LA-J551P Schematic
Technical Specifications
Technical Summary
This Compal LA-LJ551P R02 schematic, dated 2019-08-22, details a motherboard built around the Intel Ice Lake-U processor platform with DDR4 3200MHz memory down architecture, featuring four RAM chips on channel A and four on channel B. The discrete graphics solution is an NVIDIA N17S-G3/G4 with 2GB GDDR5 VRAM. System management is handled by an ENE KB9052 KBC, while the BIOS is stored on a 16MB SPI ROM. The audio subsystem uses a Realtek ALC3287 codec. Connectivity includes a Parade PS8719 USB3 redriver, a Realtek RTS5232S card reader, and a Realtek RTS5457 wireless module. A reserved Realtek RTS5467A LAN IC and a TI SN1702001 HDMI level shifter are also specified in the block diagram.
Technician FAQ
Q: What is the board number and revision of this schematic?
A: The board number is LA-LJ551P, and the schematic revision is R02.
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an ENE KB9052.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 16MB SPI ROM.
Q: What is the memory architecture?
A: The memory is DDR4 3200MHz with a memory down architecture, using four RAM chips on channel A and four on channel B.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | LA-J551P |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Board Number | LA-LJ551P |
| Revision | R02 |
| Date | 2019-08-22 |
| CPU Platform | Intel Ice Lake-U |
| GPU Type | NVIDIA N17S-G3/G4 |
| EC / KBC | ENE KB9052 |
| Audio Codec | Realtek ALC3287 |
| BIOS / SPI Flash | 16MB SPI ROM |
| RAM Type | DDR4 3200MHz |
| RAM Architecture | Memory Down |
| RAM Quantity / Slots | CH-A on board RAM x4, CH-B on board RAM x4 |
| Card Reader IC | Realtek RTS5232S |
| USB Hub IC | Parade PS8719 |
| LAN IC | Realtek RTS5467A (Reserve) |
| WiFi / WLAN IC | Realtek RTS5457 |
| HDMI Level Shifter | TI SN1702001 |
Technical Summary
This Compal LA-LJ551P R02 schematic, dated 2019-08-22, details a motherboard built around the Intel Ice Lake-U processor platform with DDR4 3200MHz memory down architecture, featuring four RAM chips on channel A and four on channel B. The discrete graphics solution is an NVIDIA N17S-G3/G4 with 2GB GDDR5 VRAM. System management is handled by an ENE KB9052 KBC, while the BIOS is stored on a 16MB SPI ROM. The audio subsystem uses a Realtek ALC3287 codec. Connectivity includes a Parade PS8719 USB3 redriver, a Realtek RTS5232S card reader, and a Realtek RTS5457 wireless module. A reserved Realtek RTS5467A LAN IC and a TI SN1702001 HDMI level shifter are also specified in the block diagram.
Technician FAQ
Q: What is the board number and revision of this schematic?
A: The board number is LA-LJ551P, and the schematic revision is R02.
Q: What EC/KBC is used on this motherboard?
A: The EC/KBC is an ENE KB9052.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 16MB SPI ROM.
Q: What is the memory architecture?
A: The memory is DDR4 3200MHz with a memory down architecture, using four RAM chips on channel A and four on channel B.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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