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MSI MC871 MS-9154-040 Rev A00 110 10A Schematic
Technical Specifications
Technical Specifications
Technical Specifications
Technical Summary
This Dell PowerEdge 2800/2850/1850 server planar, designated MC871 revision A00 dated August 12, 2005, is built around an Intel ICH5R southbridge and supports DDR2 memory. The platform utilizes Radeon Video graphics and Gigabit Ethernet connectivity. The board is managed by a BMC (Baseboard Management Controller) and includes a System CPLD for logic integration. Clock generation is handled by a Clock Synth. and a Differential Buffer DB800. The firmware hub (FWH) is present for BIOS storage. The planar supports multiple chassis configurations with separate 1U and 2U/5U PWA assembly variants. The project code is Trio MLK2 Planar, and the PWB silk color is Red.
Technician FAQ
Q: What is the board number and revision for this Dell server planar?
A: The board number is MC871, revision A00, dated 08/12/2005.
Q: What southbridge is used on this Dell PowerEdge planar?
A: The southbridge is an Intel ICH5R.
Q: What type of memory does this planar support?
A: This planar supports DDR2 memory.
Q: What management controller is present on this board?
A: A BMC (Baseboard Management Controller) is present.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
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Technical Specifications
Technical Summary
This Dell Computer Corporation schematic, dated 11/19/2004, documents the LINDY PLANAR motherboard (revision a00) for the PE2800/2850/1850 server platform. The board is built around the Xeon processor family (Big Bend, Kobuk, Corvette) with an ICH5R southbridge and Radeon Video graphics. Memory architecture is DDR2, supported by VRD voltage regulators. The system integrates Gigabit Ethernet, AC97 audio, and a Super I/O controller. The BMC (Baseboard Management Controller) handles EC/KBC functions, thermal monitoring, and charging architecture. The drawing number is 123BD, and the document number is C8358.
Technician FAQ
Q: What is the board number and revision for this Dell server motherboard?
A: The board is identified as LINDY PLANAR, revision a00.
Q: What processor platform does this motherboard support?
A: This motherboard supports the Xeon processor family, specifically the Big Bend, Kobuk, and Corvette platforms.
Q: What type of memory architecture is used on this board?
A: The memory architecture is DDR2.
Q: What is the EC/KBC controller on this motherboard?
A: The EC/KBC functions are handled by the BMC (Baseboard Management Controller).
Q: What is the document number for this schematic?
A: The document number is C8358.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This Dell PowerEdge 2800/2850, 1850 server planar, project code TRIO MLK PLANAR, board number C8358 revision A00-001 dated 12/20/2004, is built around a dual-processor architecture with ICH5/ICH5R southbridge and MCH memory controller hub. Graphics are handled by Radeon Video. System management is provided by a BMC controller. Memory architecture is DDR2. Networking is Gigabit Ethernet. Power regulation uses VRD and Voltage Regulators. The board includes a Clock Synth., Differential Buffer DB800, System CPLD, PXH, FWH, Super I/O 373, MicroVu thermal sensor, and Fan PWM Controllers.
Technician FAQ
Q: What is the board number and revision for this Dell server planar?
A: The board number is C8358, revision A00-001.
Q: What southbridge is used on this motherboard?
A: The southbridge is ICH5/ICH5R.
Q: What type of system management controller is used?
A: The system management controller is a BMC.
Q: What memory architecture does this board support?
A: This board supports DDR2 memory.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Motherboard Manufacturer | Dell Computer Corporation |
| Project Code | 2800/2850/1850 |
| Board Number | P# W7747 |
| Revision | a00 |
| Date | 11/19/2004 |
| CPU Platform | Processors |
| GPU Type | Radeon Video |
| Graphics Architecture | Radeon Video |
| RAM Type | DDR2 |
| RAM Architecture | DDR2 |
| LAN IC | Gigabit Ethernet |
| WiFi / WLAN IC | Gigabit Ethernet |
| PCH / Southbridge | ICH5 |
| Super I/O | Super I/O, 373 |
| BMC | BMC |
| System CPLD | System CPLD |
| Clock Synth. | Clock Synth. |
| Differential Buffer | Differential Buffer DB800 |
| FWH | FWH |
| PXH | PXH |
| VRD | VRD |
| Voltage Regulators | Voltage Regulators |
| Fan PWM Controllers | Fan PWM Controllers |
| Battery / Intrusion Detect / RAID Key / VAux Pwrgood | Battery / Intrusion Detect / RAID Key / VAux Pwrgood |
| Fans and fan LED's | Fans and fan LED's |
| Parallel Port / ID Button / Rear Cyclops / Speaker | Parallel Port / ID Button / Rear Cyclops / Speaker |
| Keyboard, Mouse, COM Ports, I2C MUX/Table | Keyboard, Mouse, COM Ports, I2C MUX/Table |
| USB / Buttons | USB / Buttons |
| PCI bus p/u's / PCI Debug Slot | PCI bus p/u's / PCI Debug Slot |
| Debug Features | Debug Features |
| ITP 32 & Level Translation Circuits | ITP 32 & Level Translation Circuits |
| BMC - Serial Port MUXing Diagram | BMC - Serial Port MUXing Diagram |
| BMC, Serial Port Muxing | BMC, Serial Port Muxing |
| 1.2V Vtt generation | 1.2V Vtt generation |
| VAux reset | VAux reset |
| Decoupling Caps | Decoupling Caps |
| DDR2, routing diagram | DDR2, routing diagram |
| DDR2, VRef | DDR2, VRef |
| MCH, memory | MCH, memory |
| MCH, GTL, Exp, Hub-link | MCH, GTL, Exp, Hub-link |
| MCH, power | MCH, power |
| Processors | Processors |
| Processors | Processors |
| VRD | VRD |
| Voltage Regulators | Voltage |
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Model | PowerEdge 2800/2850/1850 |
| Motherboard Manufacturer | Dell Inc. |
| Board Number | D1660 |
| Revision | A03-00 |
| Date | 12/16/2004 |
| CPU Platform | Processors |
| PCH / Southbridge | ICH5R |
| GPU Type | Radeon Video |
| Graphics Architecture | Radeon Video |
| LAN IC | Gigabit Ethernet |
| RAM Type | DDR2 |
| RAM Architecture | DDR2 |
| RAM Quantity / Slots | DDR2 |
| Charging IC | Battery / Intrusion Detect / RAID Key / VAux Pwrgood |
| Power IC(s) | Voltage Regulators VRD |
| Thermal Sensor | Fans and fan LED's |
| Card Reader IC | SD Card |
| USB Hub IC | USB / Buttons |
| WiFi / WLAN IC | Wireless |
| HDMI Level Shifter | HDMI |
| Audio Codec | Audio |
| EC / KBC | BMC |
| EC/KBC Programmable | BMC |
| BIOS / SPI Flash | FWH |
| BIOS Flash Package | FWH |
| EC Flash / ROM | BMC |
| Charger Architecture | Battery / Intrusion Detect / RAID Key / VAux Pwrgood |
| Drawing Number | D1660 |
| Document Number | D1660 |
| Project Code | 2800/2850/1850 |
| Platform Alias | LINDY PLANARD |
| CPU Socket | Processors |
| dGPU Chip Number | Radeon Video |
| dGPU to UMA Conversion Support | Radeon Video |
| Compatible BIOS IC Models | FWH |
| Super I/O | Super I/O, 373 |
| Clock Generator | Clock Synth. |
| System CPLD | System CPLD |
| Differential Buffer | Differential Buffer DB800 |
| Fan Controller | Fan PWM Controllers |
| Serial Port | Serial Port MUXing Diagram |
| Parallel Port | Parallel Port / ID Button / Rear Cyclops / Speaker |
| Keyboard | Keyboard, Mouse, COM Ports, I2C MUX/Table |
| Mouse | Keyboard, Mouse, COM Ports, I2C MUX/Table |
| ITP | ITP 32 & Level Translation Circuits |
| PCI Bus | PCI bus p/u's / PCI Debug Slot |
| Debug Features | Debug Features |
| Battery |
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Model | PE2800/2850/1850 |
| Motherboard Manufacturer | Dell Computer Corporation |
| Board Number | MC871 |
| Revision | A00 |
| Date | 08/12/2005 |
| CPU Platform | Processors |
| PCH / Southbridge | ICH5R |
| GPU Type | Radeon Video |
| LAN IC | Gigabit Ethernet |
| RAM Type | DDR2 |
| Super I/O | Super I/O, 373 |
| BMC | BMC |
| System CPLD | System CPLD |
| Clock Generator | Clock Synth. |
| Differential Buffer | Differential Buffer DB800 |
| FWH | FWH |
| PWA Assembly | 1U PWA assembly |
| PWA Assembly (Alt) | 2U/5U PWA assembly |
| Drawing Number | 123BD |
| Document Number | MC871 |
| PWA Number | PWA,PLN,SV,DELL,PE2800/2850/1850 |
| Project Code | Trio MLK2 Planar |
| PWB/Silk Color | Red |
Technical Summary
This Dell PowerEdge 2800/2850/1850 server planar, designated MC871 revision A00 dated August 12, 2005, is built around an Intel ICH5R southbridge and supports DDR2 memory. The platform utilizes Radeon Video graphics and Gigabit Ethernet connectivity. The board is managed by a BMC (Baseboard Management Controller) and includes a System CPLD for logic integration. Clock generation is handled by a Clock Synth. and a Differential Buffer DB800. The firmware hub (FWH) is present for BIOS storage. The planar supports multiple chassis configurations with separate 1U and 2U/5U PWA assembly variants. The project code is Trio MLK2 Planar, and the PWB silk color is Red.
Technician FAQ
Q: What is the board number and revision for this Dell server planar?
A: The board number is MC871, revision A00, dated 08/12/2005.
Q: What southbridge is used on this Dell PowerEdge planar?
A: The southbridge is an Intel ICH5R.
Q: What type of memory does this planar support?
A: This planar supports DDR2 memory.
Q: What management controller is present on this board?
A: A BMC (Baseboard Management Controller) is present.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Motherboard Manufacturer | Dell Computer Corporation |
| Board Number | D1660 |
| Revision | A02-00 |
| Date | 10/21/2004 |
| CPU Platform | Processors |
| PCH / Southbridge | ICH5R |
| GPU Type | Radeon Video |
| Graphics Architecture | Radeon Video |
| RAM Type | DDR2 |
| LAN IC | Gigabit Ethernet |
| WiFi / WLAN IC | Gigabit Ethernet |
| BMC | BMC |
| Super I/O | Super I/O, 373 |
| Clock Generator | Clock Synth. |
| System CPLD | System CPLD |
| Voltage Regulators | VRD |
| Fan Controllers | Fan PWM Controllers |
| Differential Buffer | Differential Buffer DB800 |
| PWA Number | H1754 |
| PWA Assembly Number | P# H1754 |
| PWA Assembly Number (1U) | 1U PWA assembly |
| PWA Assembly Number (2U/5U) | 2U/5U PWA assembly |
| PWA Assembly Number (Spares) | P# D8266 |
| PWB Number | PWB: |
| Schematic Number | SCHEM: |
| Assembly Drawing Number | ASSY DWG: |
| Document Number | D1660 |
| Drawing Number | D1660 |
| Project Code | 2800/2850/1850 |
| Platform Alias | Big Bend, Kobuk, Corvette |
| PCH / Southbridge | ICH5 |
| Memory Controller Hub | MCH, memory |
| PCI Express Hub | PXH |
| Firmware Hub | FWH |
| ITP Connector | ITP 32 & Level Translation Circuits |
| Battery | Battery / Intrusion Detect / RAID Key / VAux Pwrgood |
| Parallel Port | Parallel Port / ID Button / Rear Cyclops / Speaker |
| Keyboard | Keyboard, Mouse, COM Ports, I2C MUX/Table |
| USB | USB / Buttons |
| Fans | Fans and fan LED's |
| PCI Bus | PCI bus p/u's / PCI Debug Slot |
| Debug Features | Debug Features |
| BOM Build Options | BOM Build option table |
| BOM Build Options (1U) | 1U, Production |
| BOM Build Options (2U/5U) | 2U/5U Production |
| PWB/Silk Color (Red) | Red |
| PWB/Silk Color (White) |
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Motherboard Manufacturer | Dell Computer Corporation |
| Board Number | LINDY PLANAR |
| Revision | a00 |
| Date | 11/19/2004 |
| CPU Platform | Xeon (Big Bend, Kobuk, Corvette) |
| GPU Type | Radeon Video |
| Graphics Architecture | Radeon Video |
| PCH / Southbridge | ICH5R |
| RAM Type | DDR2 |
| RAM Architecture | DDR2 |
| LAN IC | Gigabit Ethernet |
| WiFi / WLAN IC | Gigabit Ethernet |
| EC / KBC | BMC |
| EC/KBC Programmable | BMC |
| Audio Codec | AC97 |
| Charging IC | BMC |
| Charger Architecture | BMC |
| Power IC(s) | VRD |
| RAM Quantity / Slots | DDR2 |
| Card Reader IC | Super I/O |
| USB Hub IC | ICH5 |
| HDMI Level Shifter | Radeon Video |
| Thermal Sensor | BMC |
| Document Number | C8358 |
| Drawing Number | 123BD |
| Project Code | PE2800/2850/1850 |
Technical Summary
This Dell Computer Corporation schematic, dated 11/19/2004, documents the LINDY PLANAR motherboard (revision a00) for the PE2800/2850/1850 server platform. The board is built around the Xeon processor family (Big Bend, Kobuk, Corvette) with an ICH5R southbridge and Radeon Video graphics. Memory architecture is DDR2, supported by VRD voltage regulators. The system integrates Gigabit Ethernet, AC97 audio, and a Super I/O controller. The BMC (Baseboard Management Controller) handles EC/KBC functions, thermal monitoring, and charging architecture. The drawing number is 123BD, and the document number is C8358.
Technician FAQ
Q: What is the board number and revision for this Dell server motherboard?
A: The board is identified as LINDY PLANAR, revision a00.
Q: What processor platform does this motherboard support?
A: This motherboard supports the Xeon processor family, specifically the Big Bend, Kobuk, and Corvette platforms.
Q: What type of memory architecture is used on this board?
A: The memory architecture is DDR2.
Q: What is the EC/KBC controller on this motherboard?
A: The EC/KBC functions are handled by the BMC (Baseboard Management Controller).
Q: What is the document number for this schematic?
A: The document number is C8358.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Dell |
| Model | PowerEdge 2800/2850, 1850 |
| Motherboard Manufacturer | Dell Computer Corp. |
| Project Code | TRIO MLK PLANAR |
| Board Number | C8358 |
| Revision | A00-001 |
| Date | 12/20/2004 |
| CPU Platform | Processors |
| PCH / Southbridge | ICH5, ICH5R |
| GPU Type | Radeon Video |
| Graphics Architecture | Radeon Video |
| EC / KBC | BMC |
| RAM Type | DDR2 |
| RAM Architecture | DDR2 |
| LAN IC | Gigabit Ethernet |
| Charger Architecture | VRD |
| Power IC(s) | Voltage Regulators, VRD |
| Thermal Sensor | MicroVu |
| Super I/O | Super I/O, 373 |
| Clock Generator | Clock Synth. |
| Differential Buffer | Differential Buffer DB800 |
| System CPLD | System CPLD |
| MCH | MCH, memory, MCH, GTL, Exp, Hub-link, MCH, power |
| PXH | PXH |
| FWH | FWH |
| Fan Controller | Fan PWM Controllers |
| Document Number | C8358 |
| Drawing Number | 123BD |
Technical Summary
This Dell PowerEdge 2800/2850, 1850 server planar, project code TRIO MLK PLANAR, board number C8358 revision A00-001 dated 12/20/2004, is built around a dual-processor architecture with ICH5/ICH5R southbridge and MCH memory controller hub. Graphics are handled by Radeon Video. System management is provided by a BMC controller. Memory architecture is DDR2. Networking is Gigabit Ethernet. Power regulation uses VRD and Voltage Regulators. The board includes a Clock Synth., Differential Buffer DB800, System CPLD, PXH, FWH, Super I/O 373, MicroVu thermal sensor, and Fan PWM Controllers.
Technician FAQ
Q: What is the board number and revision for this Dell server planar?
A: The board number is C8358, revision A00-001.
Q: What southbridge is used on this motherboard?
A: The southbridge is ICH5/ICH5R.
Q: What type of system management controller is used?
A: The system management controller is a BMC.
Q: What memory architecture does this board support?
A: This board supports DDR2 memory.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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