Salim Badakhshan
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Tongfang PF4WN2F PF4WN3F PF5WN2G GK5CN3X MB Schematic
Technical Specifications
Technical Summary
This document is a battery pack drawing for the VANDERP PF4WN3F project, dated November 22, 2018. The drawing specifies a 13-pin wire-to-board battery connector with defined pin functions including BAT+, enable to ground, battery clock and data lines, a 3.3V ROM_POR VCC supply, and a battery temperature sense pin. The battery configuration is 3S1P, indicating three cells in series and one in parallel. The drawing includes dimensional tolerances and material specifications for the battery assembly.
Technician FAQ
Q: What is the battery connector pinout for the PF4WN3F?
A: Pins 1-4 are BAT+, pin 5 is Enable to GND, pin 6 is BAT_CLK, pin 7 is BAT_DAT, pin 8 is ROM_POR VCC 3.3V, pin 9 is BATT_TEMP, and pins 10-13 are BAT-.
Q: What is the battery configuration for the PF4WN3F?
A: The battery is configured as 3S1P, meaning three cells in series and one cell in parallel.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This document, dated Thursday, September 27, 2018, references a Hall Sensor BDPFWN3F and a Switch IC APX8132AI-TRG. The connector is specified as FFC,4P,P1.0,51601-0040M-001,ACEcon_ffc-4tb10_51601-0040m_aces. The document number is 5544332211DDCCBBAALID_DB#+3.3VATitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3F.
Technician FAQ
Q: What Hall Sensor is referenced in this document?
A: BDPFWN3F.
Q: What Switch IC is used?
A: APX8132AI-TRG.
Q: What connector type is specified?
A: FFC,4P,P1.0,51601-0040M-001,ACEcon_ffc-4tb10_51601-0040m_aces.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This motherboard, identified by project code PF4WN3F and board number GS4CP5FA, is based on the WHL-H+MX150 platform. The schematic document is dated Wednesday, November 21, 2018, and carries revision A. The document number is PF4WN3F.
Technician FAQ
Q: What is the board number for this motherboard?
A: The board number is GS4CP5FA.
Q: What is the project code for this motherboard?
A: The project code is PF4WN3F.
Q: What CPU platform does this motherboard use?
A: The CPU platform is WHL-H+MX150.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
No technical data could be extracted from the provided source material.
Technician FAQ
No FAQ items could be generated from the provided source material.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This motherboard, documented under Document Number B22 dated Wednesday, November 28, 2018, utilizes the DSP-AS568 EC/KBC controller in a P48 package. The design incorporates BF5131A and BF5132A touch ICs for touch input processing. The schematic includes a 6-pin FFC connector (AFC34-S06FCA) for touch panel interface, along with ESD protection via the ESD5302N. Power rails include +3.3V_TP and +1.8V for touch subsystem operation. The EC/KBC features SPI and SQI interfaces for flash communication, along with SWD/SWCLK debug interfaces.
Technician FAQ
Q: What EC/KBC controller is used on this motherboard?
A: The DSP-AS568 in a P48 package.
Q: What touch ICs are present on this motherboard?
A: The BF5131A and BF5132A touch ICs are used.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This document, identified as PF4WN3F1.SW/CN, is a power button and LED sub-board schematic dated Monday, November 19, 2018, with revision AB13. The board includes a power button connector (CNPWR1) specified as an FFC, 12P, SMT, P0.5, 50696-0120M-002, ACECON_FFC_12R05_50696_0120M_ACES. The LED section, dated Friday, November 16, 2018, with revision AB23, uses LED21 and LED22, both LED_WHITE_4_RNM_RNM, with associated resistors R23 and R22 at 300-04. The revision history, dated Friday, November 16, 2018, with revision AA33, documents footprint modifications to SW1, SW2, H1-H4, and the deletion of H5-H8, SW2, and LED.
Technician FAQ
Q: What is the document number for this sub-board schematic?
A: The document number is PF4WN3F1.SW/CN.
Q: What is the revision and date of the power button section?
A: The power button section is revision AB13, dated Monday, November 19, 2018.
Q: What type of connector is used for the power button?
A: The power button connector (CNPWR1) is an FFC, 12P, SMT, P0.5, 50696-0120M-002, ACECON_FFC_12R05_50696_0120M_ACES.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
The TongFang Inc. AGK5CN3X MB (Project Code PF4WN3F, Revision C145, dated November 27, 2018) is built on the Intel Coffee Lake-H platform with an HM370 PCH. The motherboard supports DDR4 2400MHz non-ECC memory via two SO-DIMM slots. Graphics are handled by an N17E-G1 GPU with 1060 3GB or 6GB GDDR5 memory. The embedded controller is an IT8528E in a 128-pin LQFP package. The system BIOS is stored on a 16MB SPI flash ROM. Audio is provided by a Realtek ALC269Q-VC3-GR codec. The charging architecture uses a BQ24781 battery charger IC. Power management is handled by a suite of ICs including APW8713A, APW8804, APW8715QBI-TRG, APL3523QBI-TRG, NB687, MP2949AGQKT, MP86901B, MP86901A, uP1642T, uP1666Q, and RT8237. Networking includes a Realtek RTL8118AG LAN controller and an RTL8111G WLAN IC. A Realtek RTS5170-GR card reader is also present.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is an IT8528E in a 128-pin LQFP package.
Q: What is the charging IC and architecture?
A: The charging IC is a BQ24781 battery charger.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 16MB SPI flash ROM.
Q: What is the GPU configuration?
A: The GPU is an N17E-G1 with 1060 3GB or 6GB GDDR5 memory.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
The TongFang Inc. AGK5CN3X MB motherboard, project code PF4WN3F, revision C145, dated November 29, 2018, is built on the Intel Coffee Lake-H platform with an HM370 PCH. Graphics are handled by an N17E-G1 GPU with GDDR5 memory configurable as 1060 3GB or 6GB. The embedded controller is an IT8528E in a 128-pin LQFP package. System audio is provided by an ALC269Q-VC3-GR codec. The BIOS is stored on a 16MB SPI Flash ROM in an 8-pin M-SOP package. Charging is managed by a BQ24781 IC under EC control. Memory consists of two DDR4 2400MHz non-ECC SO-DIMM 260-pin slots. The board integrates an RTS5170-GR card reader, an RTL8118AG LAN IC, and an RTL8111G WLAN IC.
Technician FAQ
Q: What BIOS IC model is used on this motherboard?
A: The BIOS is a 16MB SPI Flash ROM in an 8-pin M-SOP package.
Q: What EC/KBC chip is used on this motherboard?
A: The embedded controller is an IT8528E in a 128-pin LQFP package.
Q: What is the charging IC and architecture on this motherboard?
A: The charging IC is a BQ24781, controlled by the EC.
Q: What is the GPU configuration on this motherboard?
A: The GPU is an N17E-G1 with GDDR5 memory, configurable as 1060 3GB or 6GB.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This PF4WN3F motherboard is built on the WHL-H+MX150 platform, integrating an MX150 discrete GPU. The board is documented under document number GS4CP5FA with revision A, dated Wednesday, November 28, 2018. The LAN subsystem is managed by a GST5009-LF controller. For storage expansion, the board features a card reader subsystem utilizing both RTS5170 and RT3506 controllers for SD card interface support.
Technician FAQ
Q: What is the platform and GPU configuration of this motherboard?
A: This motherboard uses the WHL-H+MX150 platform with an integrated MX150 discrete GPU.
Q: What LAN controller is used on this motherboard?
A: The LAN subsystem is managed by a GST5009-LF controller.
Q: What card reader controllers are present on this motherboard?
A: The card reader subsystem uses both RTS5170 and RT3506 controllers.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | VANDERP |
| Model | PF4WN3F |
| Project Name | PF4WN3F |
| Drawing Name | BAT_3S1P_PF4WN3F |
| Date | 11/22/18 |
| Revision | REV. |
| Part Number | 12345678ABCD12345678ABCD27.42235.5 |
Technical Summary
This document is a battery pack drawing for the VANDERP PF4WN3F project, dated November 22, 2018. The drawing specifies a 13-pin wire-to-board battery connector with defined pin functions including BAT+, enable to ground, battery clock and data lines, a 3.3V ROM_POR VCC supply, and a battery temperature sense pin. The battery configuration is 3S1P, indicating three cells in series and one in parallel. The drawing includes dimensional tolerances and material specifications for the battery assembly.
Technician FAQ
Q: What is the battery connector pinout for the PF4WN3F?
A: Pins 1-4 are BAT+, pin 5 is Enable to GND, pin 6 is BAT_CLK, pin 7 is BAT_DAT, pin 8 is ROM_POR VCC 3.3V, pin 9 is BATT_TEMP, and pins 10-13 are BAT-.
Q: What is the battery configuration for the PF4WN3F?
A: The battery is configured as 3S1P, meaning three cells in series and one cell in parallel.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Date | Thursday, September 27, 2018 |
| Document Number | 5544332211DDCCBBAALID_DB#+3.3VATitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3F |
| Hall Sensor | BDPFWN3F |
| Switch IC | APX8132AI-TRG |
| Connector | FFC,4P,P1.0,51601-0040M-001,ACEcon_ffc-4tb10_51601-0040m_aces |
Technical Summary
This document, dated Thursday, September 27, 2018, references a Hall Sensor BDPFWN3F and a Switch IC APX8132AI-TRG. The connector is specified as FFC,4P,P1.0,51601-0040M-001,ACEcon_ffc-4tb10_51601-0040m_aces. The document number is 5544332211DDCCBBAALID_DB#+3.3VATitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3FTitleSizeDocument NumberRevDate:SheetofAB11Thursday, September 27, 2018Hall Sensor BDPFWN3F.
Technician FAQ
Q: What Hall Sensor is referenced in this document?
A: BDPFWN3F.
Q: What Switch IC is used?
A: APX8132AI-TRG.
Q: What connector type is specified?
A: FFC,4P,P1.0,51601-0040M-001,ACEcon_ffc-4tb10_51601-0040m_aces.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | GS4CP5FA |
| Model | PF4WN3F |
| Project Code | PF4WN3F |
| Board Number | GS4CP5FA |
| Revision | A |
| Date | Wednesday, November 21, 2018 |
| CPU Platform | WHL-H+MX150 |
| Document Number | PF4WN3F |
Technical Summary
This motherboard, identified by project code PF4WN3F and board number GS4CP5FA, is based on the WHL-H+MX150 platform. The schematic document is dated Wednesday, November 21, 2018, and carries revision A. The document number is PF4WN3F.
Technician FAQ
Q: What is the board number for this motherboard?
A: The board number is GS4CP5FA.
Q: What is the project code for this motherboard?
A: The project code is PF4WN3F.
Q: What CPU platform does this motherboard use?
A: The CPU platform is WHL-H+MX150.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|
Technical Summary
No technical data could be extracted from the provided source material.
Technician FAQ
No FAQ items could be generated from the provided source material.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Document Number | B22 |
| Date | Wednesday, November 28, 2018 |
| EC / KBC | DSP-AS568 |
| EC/KBC Package | P48 |
| Touch IC | BF5131A |
| Touch IC | BF5132A |
Technical Summary
This motherboard, documented under Document Number B22 dated Wednesday, November 28, 2018, utilizes the DSP-AS568 EC/KBC controller in a P48 package. The design incorporates BF5131A and BF5132A touch ICs for touch input processing. The schematic includes a 6-pin FFC connector (AFC34-S06FCA) for touch panel interface, along with ESD protection via the ESD5302N. Power rails include +3.3V_TP and +1.8V for touch subsystem operation. The EC/KBC features SPI and SQI interfaces for flash communication, along with SWD/SWCLK debug interfaces.
Technician FAQ
Q: What EC/KBC controller is used on this motherboard?
A: The DSP-AS568 in a P48 package.
Q: What touch ICs are present on this motherboard?
A: The BF5131A and BF5132A touch ICs are used.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Document Number | PF4WN3F1.SW/CN |
| Date | Monday, November 19, 2018 |
| Revision | AB13 |
Technical Summary
This document, identified as PF4WN3F1.SW/CN, is a power button and LED sub-board schematic dated Monday, November 19, 2018, with revision AB13. The board includes a power button connector (CNPWR1) specified as an FFC, 12P, SMT, P0.5, 50696-0120M-002, ACECON_FFC_12R05_50696_0120M_ACES. The LED section, dated Friday, November 16, 2018, with revision AB23, uses LED21 and LED22, both LED_WHITE_4_RNM_RNM, with associated resistors R23 and R22 at 300-04. The revision history, dated Friday, November 16, 2018, with revision AA33, documents footprint modifications to SW1, SW2, H1-H4, and the deletion of H5-H8, SW2, and LED.
Technician FAQ
Q: What is the document number for this sub-board schematic?
A: The document number is PF4WN3F1.SW/CN.
Q: What is the revision and date of the power button section?
A: The power button section is revision AB13, dated Monday, November 19, 2018.
Q: What type of connector is used for the power button?
A: The power button connector (CNPWR1) is an FFC, 12P, SMT, P0.5, 50696-0120M-002, ACECON_FFC_12R05_50696_0120M_ACES.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | TongFang Inc. |
| Model | AGK5CN3X MB |
| Motherboard Manufacturer | TongFang Inc. |
| Project Code | PF4WN3F |
| Board Number | AGK5CN3X MB |
| Revision | C145 |
| Date | Tuesday, November 27, 2018 |
| CPU Platform | Coffee Lake - H |
| PCH / Southbridge | HM370 |
| GPU Type | N17E-G1 |
| Graphics Architecture | 1060 3GB or 6GB |
| EC / KBC | IT8528E |
| EC/KBC Package | 128 Pin LQFP |
| Audio Codec | ALC269Q-VC3-GR |
| BIOS / SPI Flash | 16MB |
| Charging IC | BQ24781 |
| Charger Architecture | BATTERY CHARGER |
| Power IC(s) | APW8713A, APW8804, APW8715QBI-TRG, APL3523QBI-TRG, NB687, MP2949AGQKT, MP86901B, MP86901A, uP1642T, uP1666Q, RT8237 |
| RAM Type | DDR4 2400MHz (NON ECC) |
| RAM Architecture | 2*DDR4 SO-DIMM |
| RAM Quantity / Slots | 2 |
| LAN IC | RTL8118AG |
| WiFi / WLAN IC | RTL8111G |
| Card Reader IC | RTS5170-GR |
Technical Summary
The TongFang Inc. AGK5CN3X MB (Project Code PF4WN3F, Revision C145, dated November 27, 2018) is built on the Intel Coffee Lake-H platform with an HM370 PCH. The motherboard supports DDR4 2400MHz non-ECC memory via two SO-DIMM slots. Graphics are handled by an N17E-G1 GPU with 1060 3GB or 6GB GDDR5 memory. The embedded controller is an IT8528E in a 128-pin LQFP package. The system BIOS is stored on a 16MB SPI flash ROM. Audio is provided by a Realtek ALC269Q-VC3-GR codec. The charging architecture uses a BQ24781 battery charger IC. Power management is handled by a suite of ICs including APW8713A, APW8804, APW8715QBI-TRG, APL3523QBI-TRG, NB687, MP2949AGQKT, MP86901B, MP86901A, uP1642T, uP1666Q, and RT8237. Networking includes a Realtek RTL8118AG LAN controller and an RTL8111G WLAN IC. A Realtek RTS5170-GR card reader is also present.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is an IT8528E in a 128-pin LQFP package.
Q: What is the charging IC and architecture?
A: The charging IC is a BQ24781 battery charger.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 16MB SPI flash ROM.
Q: What is the GPU configuration?
A: The GPU is an N17E-G1 with 1060 3GB or 6GB GDDR5 memory.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | TongFang Inc. |
| Model | AGK5CN3X MB |
| Motherboard Manufacturer | TongFang Inc. |
| Project Code | PF4WN3F |
| Board Number | AGK5CN3X MB |
| Revision | C145 |
| Date | Thursday, November 29, 2018 |
| CPU Platform | Coffee Lake - H |
| PCH / Southbridge | HM370 |
| GPU Type | N17E-G1 |
| Graphics Architecture | GDDR5 X6 (1060) 1060 3GB or 6GB |
| EC / KBC | IT8528E |
| EC/KBC Package | 128 Pin LQFP |
| Audio Codec | ALC269Q-VC3-GR |
| BIOS / SPI Flash | Flash Rom 8 Pin M-SOP |
| BIOS Flash Capacity | 16MB |
| Charging IC | BQ24781 |
| Charger Architecture | BATTERY CHARGER IC EC CONTROLER |
| RAM Type | DDR4 2400MHz (NON ECC) |
| RAM Architecture | SO-DIMM 260 Pin |
| RAM Quantity / Slots | 2 |
| Card Reader IC | RTS5170-GR |
| LAN IC | RTL8118AG |
| WiFi / WLAN IC | RTL8111G |
Technical Summary
The TongFang Inc. AGK5CN3X MB motherboard, project code PF4WN3F, revision C145, dated November 29, 2018, is built on the Intel Coffee Lake-H platform with an HM370 PCH. Graphics are handled by an N17E-G1 GPU with GDDR5 memory configurable as 1060 3GB or 6GB. The embedded controller is an IT8528E in a 128-pin LQFP package. System audio is provided by an ALC269Q-VC3-GR codec. The BIOS is stored on a 16MB SPI Flash ROM in an 8-pin M-SOP package. Charging is managed by a BQ24781 IC under EC control. Memory consists of two DDR4 2400MHz non-ECC SO-DIMM 260-pin slots. The board integrates an RTS5170-GR card reader, an RTL8118AG LAN IC, and an RTL8111G WLAN IC.
Technician FAQ
Q: What BIOS IC model is used on this motherboard?
A: The BIOS is a 16MB SPI Flash ROM in an 8-pin M-SOP package.
Q: What EC/KBC chip is used on this motherboard?
A: The embedded controller is an IT8528E in a 128-pin LQFP package.
Q: What is the charging IC and architecture on this motherboard?
A: The charging IC is a BQ24781, controlled by the EC.
Q: What is the GPU configuration on this motherboard?
A: The GPU is an N17E-G1 with GDDR5 memory, configurable as 1060 3GB or 6GB.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | PF4WN3F |
| Project Code | PF4WN3F |
| Platform | WHL-H+MX150 |
| Document Number | GS4CP5FA |
| Date | Wednesday, November 28, 2018 |
| Revision | A |
| CPU Platform | WHL-H+MX150 |
| GPU Type | MX150 |
| Graphics Architecture | MX150 |
| Card Reader IC | RTS5170 |
| Card Reader IC | RT3506 |
| LAN IC | GST5009-LF |
Technical Summary
This PF4WN3F motherboard is built on the WHL-H+MX150 platform, integrating an MX150 discrete GPU. The board is documented under document number GS4CP5FA with revision A, dated Wednesday, November 28, 2018. The LAN subsystem is managed by a GST5009-LF controller. For storage expansion, the board features a card reader subsystem utilizing both RTS5170 and RT3506 controllers for SD card interface support.
Technician FAQ
Q: What is the platform and GPU configuration of this motherboard?
A: This motherboard uses the WHL-H+MX150 platform with an integrated MX150 discrete GPU.
Q: What LAN controller is used on this motherboard?
A: The LAN subsystem is managed by a GST5009-LF controller.
Q: What card reader controllers are present on this motherboard?
A: The card reader subsystem uses both RTS5170 and RT3506 controllers.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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