Schematic toshiba satellite 1000-1005 compal la-1311 rev1a schematic

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toshiba satellite 1000-1005 compal_la-1311_rev1a schematic

toshiba satellite 1000-1005=1=compal_la-1311_rev1a.pdf




Technical Specifications

ParameterValue
BrandCompal
ModelATW02
Motherboard ManufacturerCompal Electronics, Inc.
Board NumberLA-1311
Revision1.0
Date343, 26, 2001
CPU PlatformMobile Celeron / Coppermine-T
EC / KBCNS PC87591
Audio CodecCS4299
Charging ICMAX1617MEE
Charger ArchitectureSmart Battery
RAM TypeSDRAM
RAM ArchitectureSO-DIMM * 2
RAM Quantity / Slots2
Thermal SensorMAX1617MEE
Card Reader ICTI PCI1420
LAN ICICS9250-38
WiFi / WLAN ICMini PCI
PCH / SouthbridgeICH3-M
GPU TypeAlmador-M GMCH-M
Graphics ArchitectureAGP 4X
Super I/OLPC47N227
Clock GeneratorICS9238-50
Document Number4012041A

Technical Summary

This Compal LA-1311 motherboard, documented under schematic number 4012041A, is designed for the ATW02 model platform. The board supports a Mobile Celeron or Coppermine-T CPU in a uFCBGA/uFCPGA package, paired with an Almador-M GMCH-M northbridge providing AGP 4X graphics and an ICH3-M southbridge. System memory consists of two SO-DIMM slots for SDRAM. The embedded controller is an NS PC87591, while the Super I/O is handled by an LPC47N227. Audio is managed by a CS4299 AC'97 codec, and the charging architecture is Smart Battery controlled by a MAX1617MEE IC, which also serves as the thermal sensor. A TI PCI1420 provides CardBus support, and networking is via an ICS9250-38 LAN controller with a Mini PCI socket for wireless expansion. The clock generator is an ICS9238-50.

Technician FAQ

Q: What is the board number and document number for this motherboard?

A: The board number is LA-1311, and the schematic document number is 4012041A.

Q: What EC/KBC is used on this motherboard?

A: The embedded controller is an NS PC87591.

Q: What is the charging architecture and charging IC?

A: The charging architecture is Smart Battery, controlled by a MAX1617MEE IC.

Q: What type of memory does this board support?

A: This board supports SDRAM in two SO-DIMM slots.

Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
 

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