toshiba satellite c600 ct10g mp 2010.10.06
Technical Specifications
Technical Summary
This Inventec Calcutta motherboard, revision A02 dated 6-Oct-2010, is built on the Arrandale CPU platform with a Socket-rPGA989 and uses a PCH southbridge. The system memory architecture is DDR III SODIMM across two slots, DIMM0 and DIMM1. The embedded controller is a WINB781, and the audio codec is a CX20671. The SPI BIOS is stored in an EEROM. The charging subsystem is a System Charger architecture utilizing a TI_BQ24725RGRR_QFN_20P charging IC. Networking is handled by an AR8152-AL1E 10/100 LAN IC and an Atheros WLAN module. The clock generator is an IDT_ICS9LRS3197AKLF_T_MLF_32P, and the battery reset IC is a GMT_G686LT11U_SOT23_5P.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is a WINB781.
Q: What charging IC is used on this motherboard?
A: The charging IC is a TI_BQ24725RGRR_QFN_20P.
Q: What is the memory architecture of this motherboard?
A: The memory architecture is DDR III SODIMM with two slots, DDR DIMM0 and DDR DIMM1.
Q: What LAN and WLAN ICs are used?
A: The LAN IC is an AR8152-AL1E (10/100) and the WLAN IC is from Atheros.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Inventec |
| Model | Calcutta |
| Project Code | Calcutta |
| Board Number | CSA3 |
| Revision | A02 |
| Date | 6-Oct-2010 |
| Motherboard Manufacturer | Inventec |
| Document Number | CSA3 |
| CPU Platform | Arrandale |
| CPU Socket | Socket-rPGA989 |
| PCH / Southbridge | PCH |
| GPU Type | GPU |
| EC / KBC | WINB781 |
| Audio Codec | CX20671 |
| BIOS / SPI Flash | SPI BIOS EEROM |
| Charging IC | TI_BQ24725RGRR_QFN_20P |
| Charger Architecture | System Charger |
| RAM Type | DDR III |
| RAM Architecture | SODIMM |
| RAM Quantity / Slots | DDR DIMM0, DDR DIMM1 |
| LAN IC | AR8152-AL1E(10/100) |
| WiFi / WLAN IC | Atheros |
| Card Reader IC | CARD READER |
| Clock Generator | IDT_ICS9LRS3197AKLF_T_MLF_32P |
| Battery Reset IC | GMT_G686LT11U_SOT23_5P |
Technical Summary
This Inventec Calcutta motherboard, revision A02 dated 6-Oct-2010, is built on the Arrandale CPU platform with a Socket-rPGA989 and uses a PCH southbridge. The system memory architecture is DDR III SODIMM across two slots, DIMM0 and DIMM1. The embedded controller is a WINB781, and the audio codec is a CX20671. The SPI BIOS is stored in an EEROM. The charging subsystem is a System Charger architecture utilizing a TI_BQ24725RGRR_QFN_20P charging IC. Networking is handled by an AR8152-AL1E 10/100 LAN IC and an Atheros WLAN module. The clock generator is an IDT_ICS9LRS3197AKLF_T_MLF_32P, and the battery reset IC is a GMT_G686LT11U_SOT23_5P.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is a WINB781.
Q: What charging IC is used on this motherboard?
A: The charging IC is a TI_BQ24725RGRR_QFN_20P.
Q: What is the memory architecture of this motherboard?
A: The memory architecture is DDR III SODIMM with two slots, DDR DIMM0 and DDR DIMM1.
Q: What LAN and WLAN ICs are used?
A: The LAN IC is an AR8152-AL1E (10/100) and the WLAN IC is from Atheros.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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