toshiba satellite c660 c655 la-6842p pwwaa rev 0.2
Technical Specifications
Technical Summary
This Compal PWWAA LA6842P M/B revision 0.2 schematic, dated 2010/06/21, details a motherboard built around the Intel Arrandale processor and Ibex Peak-M (HM55) PCH platform. The system memory architecture consists of DDRIII-SO-DIMM X2 supporting up to four banks of DDRIII 800/1066 MT/s memory. The embedded controller is an ENE KB926 E02, and the audio subsystem is managed by a Realtek ALC259-GR HDA codec. For connectivity, the board utilizes a Realtek RTL8105E-GR 10/100M Ethernet controller and a Realtek RTS5137 card reader. The SPI ROM is used for BIOS storage. The block diagram also indicates an integrated clock generator, the RTM890N-631-GRT, and a power circuit section for DC/DC conversion.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is LA-6842P, and the project code is PWWAA.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB926 E02.
Q: What audio codec is used on this motherboard?
A: The audio codec is a Realtek ALC259-GR.
Q: What LAN IC is used on this motherboard?
A: The LAN IC is a Realtek RTL8105E-GR 10/100M.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | PWWAA LA6842P M/B |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | PWWAA |
| Board Number | LA-6842P |
| Revision | 0.2 |
| Date | 2010/06/21 |
| CPU Platform | Intel Processor(ARD) /PCH(HM55) |
| EC / KBC | ENE KB926 E02 |
| Audio Codec | ALC259-GR |
| BIOS / SPI Flash | SPI ROM |
| LAN IC | RTL8105E-GR 10/100M |
| Card Reader IC | RTS5137 |
| RAM Type | DDRIII |
| RAM Architecture | DDRIII-SO-DIMM X2 |
| RAM Quantity / Slots | BANK 0, 1, 2, 3 |
Technical Summary
This Compal PWWAA LA6842P M/B revision 0.2 schematic, dated 2010/06/21, details a motherboard built around the Intel Arrandale processor and Ibex Peak-M (HM55) PCH platform. The system memory architecture consists of DDRIII-SO-DIMM X2 supporting up to four banks of DDRIII 800/1066 MT/s memory. The embedded controller is an ENE KB926 E02, and the audio subsystem is managed by a Realtek ALC259-GR HDA codec. For connectivity, the board utilizes a Realtek RTL8105E-GR 10/100M Ethernet controller and a Realtek RTS5137 card reader. The SPI ROM is used for BIOS storage. The block diagram also indicates an integrated clock generator, the RTM890N-631-GRT, and a power circuit section for DC/DC conversion.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is LA-6842P, and the project code is PWWAA.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB926 E02.
Q: What audio codec is used on this motherboard?
A: The audio codec is a Realtek ALC259-GR.
Q: What LAN IC is used on this motherboard?
A: The LAN IC is a Realtek RTL8105E-GR 10/100M.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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