acer aspire e1-572g compal la-9531p v5we2-v5wc2-v5wt2_rev1.0 schematic
acer aspire e1-572g=1=compal la-9531p v5we2-v5wc2-v5wt2_rev1.0.pdf
Technical Specifications
Technical Summary
This Compal LA-9531P schematic, revision 1.0 dated April 11, 2013, documents the V5WE2/T2/C2 (EA/EG/BA50_HW) motherboard platform. The core architecture is built around the Intel Shark Bay ULT platform, pairing a Haswell ULT processor with a Lynx Point-LP PCH. Graphics processing is handled by an AMD MARS/SUN dGPU, with DDR3L 1333/1600 memory supported across two 204-pin SO-DIMM slots in dual-channel configuration. The embedded controller is an ENE KB9012, and system audio is managed by an ALC3225 HDA codec. Two SPI ROMs are designated for BIOS storage, with a reserved EC ROM. Networking is provided by a Broadcom 57786X GbE LAN controller, and display connectivity includes an ITE IT6511FN DP to VGA level shifter. A 2-in-1 SD card reader is also integrated into the design.
Technician FAQ
Q: What is the board number and revision for this motherboard?
A: The board number is LA-9531P, revision 1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB9012.
Q: What is the BIOS flash configuration on this motherboard?
A: The schematic indicates two SPI ROMs for BIOS and one reserved EC ROM.
Q: What is the memory architecture of this motherboard?
A: It supports dual-channel DDR3L 1333/1600 memory via two 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
acer aspire e1-572g=1=compal la-9531p v5we2-v5wc2-v5wt2_rev1.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | V5WE2/T2/C2 (EA/EG/BA50_HW) |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Board Number | LA-9531P |
| Revision | 1.0 |
| Date | 2013-04-11 |
| CPU Platform | Intel Shark Bay ULT (Haswell + Lynx Point-LP) |
| PCH / Southbridge | Lynx Point - LP |
| GPU Type | AMD MARS / SUN |
| EC / KBC | ENE KB9012 |
| Audio Codec | ALC3225 |
| BIOS / SPI Flash | SPI ROM x2 |
| EC Flash / ROM | EC ROM x1 (reserved) |
| RAM Type | DDR3L 1333/1600 |
| RAM Architecture | Dual Channel |
| RAM Quantity / Slots | 204pin DDR3L-SO-DIMM X2 |
| LAN IC | Broadcom 57786X |
| Card Reader IC | 2 in 1 Card Reader (SD) |
| HDMI Level Shifter | ITE IT6511FN |
Technical Summary
This Compal LA-9531P schematic, revision 1.0 dated April 11, 2013, documents the V5WE2/T2/C2 (EA/EG/BA50_HW) motherboard platform. The core architecture is built around the Intel Shark Bay ULT platform, pairing a Haswell ULT processor with a Lynx Point-LP PCH. Graphics processing is handled by an AMD MARS/SUN dGPU, with DDR3L 1333/1600 memory supported across two 204-pin SO-DIMM slots in dual-channel configuration. The embedded controller is an ENE KB9012, and system audio is managed by an ALC3225 HDA codec. Two SPI ROMs are designated for BIOS storage, with a reserved EC ROM. Networking is provided by a Broadcom 57786X GbE LAN controller, and display connectivity includes an ITE IT6511FN DP to VGA level shifter. A 2-in-1 SD card reader is also integrated into the design.
Technician FAQ
Q: What is the board number and revision for this motherboard?
A: The board number is LA-9531P, revision 1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB9012.
Q: What is the BIOS flash configuration on this motherboard?
A: The schematic indicates two SPI ROMs for BIOS and one reserved EC ROM.
Q: What is the memory architecture of this motherboard?
A: It supports dual-channel DDR3L 1333/1600 memory via two 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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