Salim Badakhshan
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Acer Aspire ES1-731 DA0ZRVMB6D0 ZRV ZRVA Rev 1A Schematic
Technical Specifications
Technical Summary
The Quanta ZRV/ZRVA project is an Intel Braswell platform motherboard documented on March 11, 2015. The CPU uses an FCBGA 1170 package. The embedded controller is an IT8987 in an LQPF128 package. The system BIOS and TXE firmware are stored on a single 1.8V SPI ROM with 64Mb capacity, while the EC code resides on a separate 1.8V SPI ROM of 1Mb. Memory support includes two DDR3L SO-DIMM slots operating at 1066/1600MT/s, with a total maximum capacity of 8GB. The discrete graphics solution is an Nvidia N16 GPU. The audio codec is an ALC255 in a QFN-48 package. Networking is handled by a Realtek RTL8111H-CG LAN IC in a QFN-32 package. The card reader controller is a Realtek RTS5170 in a QFN-24 package, and the USB hub controller is a Genesys Logic GL850G-OHY3 in a QFN-28 package. The PCB is a 6-layer stackup with designated signal, power, and ground layers.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The motherboard uses a single 1.8V SPI ROM with 64Mb capacity for the BIOS and TXE firmware.
Q: Is the EC/KBC programmable on this motherboard?
A: Yes, the IT8987 EC has a dedicated 1.8V EC code SPI ROM of 1Mb capacity.
Q: What discrete GPU is used on this motherboard?
A: The motherboard uses an Nvidia N16 discrete GPU.
Q: What memory configuration does this motherboard support?
A: The motherboard supports two DDR3L SO-DIMM slots at 1066/1600MT/s, with a total maximum capacity of 8GB.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta |
| Project Code | ZRV/ZRVA |
| Document Number | 441 |
| Date | Wednesday, March 11, 2015 |
| CPU Platform | Intel Braswell |
| CPU Package | FCBGA 1170 |
| EC / KBC | IT8987 |
| EC/KBC Package | LQPF128 |
| Audio Codec | ALC255 |
| Audio Codec Package | QFN-48 |
| BIOS / SPI Flash | 1.8V BIOS+TXE SPI ROM (64Mb) |
| EC Flash / ROM | 1.8V EC code SPI ROM (1Mb) |
| RAM Type | DDR3L 1066/1600MT/s |
| RAM Architecture | SO-DIMM |
| RAM Quantity / Slots | 2 |
| Maximum RAM | 8GB per slot, Total Maximum 8GB |
| GPU Type | Nvidia N16 |
| LAN IC | RTL8111H-CG |
| LAN IC Package | QFN-32 |
| Card Reader IC | RTS5170 |
| Card Reader IC Package | QFN-24 |
| USB Hub IC | GL850G-OHY3 |
| USB Hub IC Package | QFN-28 |
| PCB Layer Count | 6L |
| PCB Stackup | LAYER 1 : TOP, LAYER 2 : SVCC, LAYER 3 : IN1(Low), LAYER 4 : IN2(High), LAYER 5 : SGND, LAYER 6 : BOT |
Technical Summary
The Quanta ZRV/ZRVA project is an Intel Braswell platform motherboard documented on March 11, 2015. The CPU uses an FCBGA 1170 package. The embedded controller is an IT8987 in an LQPF128 package. The system BIOS and TXE firmware are stored on a single 1.8V SPI ROM with 64Mb capacity, while the EC code resides on a separate 1.8V SPI ROM of 1Mb. Memory support includes two DDR3L SO-DIMM slots operating at 1066/1600MT/s, with a total maximum capacity of 8GB. The discrete graphics solution is an Nvidia N16 GPU. The audio codec is an ALC255 in a QFN-48 package. Networking is handled by a Realtek RTL8111H-CG LAN IC in a QFN-32 package. The card reader controller is a Realtek RTS5170 in a QFN-24 package, and the USB hub controller is a Genesys Logic GL850G-OHY3 in a QFN-28 package. The PCB is a 6-layer stackup with designated signal, power, and ground layers.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The motherboard uses a single 1.8V SPI ROM with 64Mb capacity for the BIOS and TXE firmware.
Q: Is the EC/KBC programmable on this motherboard?
A: Yes, the IT8987 EC has a dedicated 1.8V EC code SPI ROM of 1Mb capacity.
Q: What discrete GPU is used on this motherboard?
A: The motherboard uses an Nvidia N16 discrete GPU.
Q: What memory configuration does this motherboard support?
A: The motherboard supports two DDR3L SO-DIMM slots at 1066/1600MT/s, with a total maximum capacity of 8GB.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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