Schematic acer aspire s3-392 wistron weebill-hw revsa schematic

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acer aspire s3-392 wistron weebill-hw_revsa schematic

acer aspire s3-392=1=wistron weebill-hw_revsa.pdf




Technical Specifications

ParameterValue
BrandWistron Corporation
Project Code91.4L501.A01
Board Number12265-SB
Document NumberWEEBILL_HWSA
RevisionA3
DateWednesday, September 18, 2013
CPU PlatformHaswell ULT Processor
EC / KBCITE8518
Audio CodecALC3225
BIOS / SPI Flash8MB SPI Flash
RAM TypeDDR3L 1333/1600
RAM ArchitectureChannel A + Channel B
Card Reader ICRTS5170
LAN ICSLB9655
Thermal SensorNCT7718

Technical Summary

This Wistron WEEBILL_HWSA motherboard, project code 91.4L501.A01 with board number 12265-SB, is designed for the Haswell ULT processor platform. The system utilizes dual-channel DDR3L memory operating at 1333/1600 MHz. The embedded controller is an ITE8518, and the audio subsystem is managed by an ALC3225 codec. The BIOS is stored on an 8MB SPI flash device. Connectivity is provided by a SLB9655 LAN IC, and an RTS5170 card reader controller handles SD/MMC cards. Thermal monitoring is managed by an NCT7718 sensor. The schematic document is revision A3, dated September 18, 2013.

Technician FAQ

Q: What EC/KBC is used on this motherboard?

A: The embedded controller is an ITE8518.

Q: What is the BIOS flash configuration?

A: The BIOS is stored on an 8MB SPI flash device.

Q: What audio codec is used on this motherboard?

A: The audio codec is an ALC3225.

Q: What is the memory architecture?

A: The motherboard supports dual-channel DDR3L 1333/1600 MHz memory.

Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
 

Attachments

  • Acer Aspire S3-392=1=Wistron Weebill-HW_RevSA.zip
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