Reputation:
acer travelmate x349-m pegatron cassiopeia x3 for skylake
Technical Specifications
Technical Summary
This PEGATRON X3 revision 1.0 motherboard, dated July 11, 2016, is engineered for the Intel Skylake U platform. The system memory architecture utilizes DDR4 2133MHz in a Memory Down x4 configuration. The embedded controller is an IT8587/FX or IT8587E/FX, while the audio subsystem is handled by a Realtek ALC255 codec. Two separate SPI ROMs are present: one 16MB and one 8MB. The charging circuit is managed by a dedicated battery charger IC. Connectivity and expansion are supported by a Realtek RTS5170 card reader, an IT8987E/BX LAN controller, and an NGFF WLAN/BT module. Video output is facilitated through an Analogix ANX7428 MUX and a PS8201A HDMI repeater. Security is provided by a NUVOTON NPCT650 TPM module.
Technician FAQ
Q: What EC/KBC chips are used on this motherboard?
A: The motherboard uses an IT8587/FX or IT8587E/FX embedded controller.
Q: What BIOS/SPI flash configurations are present?
A: Two SPI ROMs are present: one 16MB and one 8MB.
Q: What is the memory architecture of this board?
A: The board uses DDR4 2133MHz memory in a Memory Down x4 configuration.
Q: What HDMI level shifters are used?
A: The board uses an Analogix ANX7428 MUX and a PS8201A HDMI repeater.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | PEGATRON |
| Project Name | X3 |
| Revision | 1.0 |
| Date | Monday, July 11, 2016 |
| CPU Platform | Skylake U |
| EC / KBC | IT8587/FX |
| EC / KBC | IT8587E/FX |
| Audio Codec | REALTEK/ ALC255 |
| BIOS / SPI Flash | SPI ROM (16M) |
| BIOS / SPI Flash | SPI ROM (8M) |
| Charging IC | BATTERY CHARGER |
| RAM Type | DDR4 |
| RAM Architecture | Memory Down x4 |
| RAM Quantity / Slots | Memory Down x4 |
| Card Reader IC | Realtek/RTS5170 |
| LAN IC | IT8987E/BX |
| WiFi / WLAN IC | NGFF WLAN / BT |
| HDMI Level Shifter | Analogix ANX7428 |
| HDMI Level Shifter | PS8201A |
| TPM | NUVOTON/NPCT650 |
| Engineer | Andy Kao |
Technical Summary
This PEGATRON X3 revision 1.0 motherboard, dated July 11, 2016, is engineered for the Intel Skylake U platform. The system memory architecture utilizes DDR4 2133MHz in a Memory Down x4 configuration. The embedded controller is an IT8587/FX or IT8587E/FX, while the audio subsystem is handled by a Realtek ALC255 codec. Two separate SPI ROMs are present: one 16MB and one 8MB. The charging circuit is managed by a dedicated battery charger IC. Connectivity and expansion are supported by a Realtek RTS5170 card reader, an IT8987E/BX LAN controller, and an NGFF WLAN/BT module. Video output is facilitated through an Analogix ANX7428 MUX and a PS8201A HDMI repeater. Security is provided by a NUVOTON NPCT650 TPM module.
Technician FAQ
Q: What EC/KBC chips are used on this motherboard?
A: The motherboard uses an IT8587/FX or IT8587E/FX embedded controller.
Q: What BIOS/SPI flash configurations are present?
A: Two SPI ROMs are present: one 16MB and one 8MB.
Q: What is the memory architecture of this board?
A: The board uses DDR4 2133MHz memory in a Memory Down x4 configuration.
Q: What HDMI level shifters are used?
A: The board uses an Analogix ANX7428 MUX and a PS8201A HDMI repeater.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
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