Reputation:
dell alienware m17x compal la-6601p_rev1.0 schematic
dell alienware m17x=1=compal la-6601p_rev1.0.pdf
Technical Specifications
Technical Summary
This Compal LA-6601P (Project Code PAR00) motherboard for Dell is built around the Intel Sandy Bridge processor platform paired with the Intel Cougar Point PCH. The system management is handled by an ENE KB930 embedded controller. The BIOS is stored on a SPI ROM. Audio is provided by an IDT 92HD73 codec, and wired networking is handled by an AR8151 Gigabit LAN controller. The memory subsystem supports dual-channel DDRIII 1066/1333 MHz memory across four 204-pin SO-DIMM slots. The graphics architecture supports both UMA and discrete (DIS) configurations via a PEG x16 interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is LA-6601P and the project code is PAR00.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What type of BIOS flash is used?
A: The BIOS is stored on a SPI ROM.
Q: What is the memory architecture?
A: The motherboard supports dual-channel DDRIII 1066/1333 MHz memory via four 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
dell alienware m17x=1=compal la-6601p_rev1.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | DELL |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | PAR00 |
| Board Number | LA-6601P |
| Revision | 1.0 |
| Date | Tuesday, November 30, 2010 |
| CPU Platform | Sandy Bridge |
| PCH / Southbridge | Intel Cougar Point |
| EC / KBC | ENE KB930 |
| Audio Codec | IDT 92HD73 |
| BIOS / SPI Flash | SPI ROM |
| LAN IC | AR8151 |
| RAM Type | DDRIII 1066/1333 MHz |
| RAM Architecture | Dual Channel |
| RAM Quantity / Slots | 204pin DDRIII SO-DIMM x4 |
| GPU Type | UMA / DIS |
| Graphics Architecture | PEG x16 (DIS) |
Technical Summary
This Compal LA-6601P (Project Code PAR00) motherboard for Dell is built around the Intel Sandy Bridge processor platform paired with the Intel Cougar Point PCH. The system management is handled by an ENE KB930 embedded controller. The BIOS is stored on a SPI ROM. Audio is provided by an IDT 92HD73 codec, and wired networking is handled by an AR8151 Gigabit LAN controller. The memory subsystem supports dual-channel DDRIII 1066/1333 MHz memory across four 204-pin SO-DIMM slots. The graphics architecture supports both UMA and discrete (DIS) configurations via a PEG x16 interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is LA-6601P and the project code is PAR00.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What type of BIOS flash is used?
A: The BIOS is stored on a SPI ROM.
Q: What is the memory architecture?
A: The motherboard supports dual-channel DDRIII 1066/1333 MHz memory via four 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
Last edited: