Reputation:
gateway nv57h compal_la-6901p_rev2.0 schematic
gateway nv57h=1=compal_la-6901p_rev2.0.pdf
Technical Specifications
Technical Summary
This Compal JE50-HR/SJV50-HR (P5WE0/P5WS0) motherboard, documented under board number LA-6901P revision 2.0 dated 2011-02-08, is built on the Intel Sandy Bridge processor platform with a Cougar Point-M PCH and an rPGA989 socket. Graphics are handled by a discrete Nvidia N12P GS/GV GPU. The system firmware is stored on a single SPI ROM. Embedded controller functions are managed by an ENE KB930. Audio is provided by a Realtek ALC271X/277X codec. Memory configuration consists of two 204-pin DDRIII SO-DIMM slots supporting dual-channel architecture. Networking and card reader functions are integrated into a single BCM57785 controller. USB 3.0 connectivity is enabled via a NEC uPD720200AF1 hub controller.
Technician FAQ
Q: What is the board number for this Compal JE50-HR/SJV50-HR motherboard?
A: The board number is LA-6901P.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What is the memory configuration for this motherboard?
A: It uses two 204-pin DDRIII SO-DIMM slots in a dual-channel architecture.
Q: What discrete GPU is used on this motherboard?
A: The discrete GPU is an Nvidia N12P GS/GV.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
gateway nv57h=1=compal_la-6901p_rev2.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | JE50-HR/SJV50-HR |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | P5WE0/P5WS0 |
| Board Number | LA-6901P |
| Revision | 2.0 |
| Date | 2011-02-08 |
| CPU Platform | Intel Sandy Bridge |
| CPU Socket | rPGA989 |
| PCH / Southbridge | Intel Cougar Point-M |
| GPU Type | Nvidia N12P GS/GV |
| EC / KBC | ENE KB930 |
| Audio Codec | ALC271X/277X |
| BIOS / SPI Flash | SPI ROM x1 |
| RAM Type | DDRIII |
| RAM Architecture | Dual Channel |
| RAM Quantity / Slots | 204pin DDRIII-SO-DIMM X2 |
| LAN IC | BCM57785 |
| WiFi / WLAN IC | WLAN, WWAN |
| Card Reader IC | BCM57785 |
| USB Hub IC | NEC uPD720200AF1 |
Technical Summary
This Compal JE50-HR/SJV50-HR (P5WE0/P5WS0) motherboard, documented under board number LA-6901P revision 2.0 dated 2011-02-08, is built on the Intel Sandy Bridge processor platform with a Cougar Point-M PCH and an rPGA989 socket. Graphics are handled by a discrete Nvidia N12P GS/GV GPU. The system firmware is stored on a single SPI ROM. Embedded controller functions are managed by an ENE KB930. Audio is provided by a Realtek ALC271X/277X codec. Memory configuration consists of two 204-pin DDRIII SO-DIMM slots supporting dual-channel architecture. Networking and card reader functions are integrated into a single BCM57785 controller. USB 3.0 connectivity is enabled via a NEC uPD720200AF1 hub controller.
Technician FAQ
Q: What is the board number for this Compal JE50-HR/SJV50-HR motherboard?
A: The board number is LA-6901P.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What is the memory configuration for this motherboard?
A: It uses two 204-pin DDRIII SO-DIMM slots in a dual-channel architecture.
Q: What discrete GPU is used on this motherboard?
A: The discrete GPU is an Nvidia N12P GS/GV.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
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