acer compal la-6901p je50-hr sjv50-hr_p5we0 p5ws0_rev0.5 schematic
acer=1=compal la-6901p je50-hr sjv50-hr_p5we0 p5ws0_rev0.5.pdf
Technical Specifications
Technical Summary
This Compal JE50-HR / SJV50-HR motherboard, project codes P5WE0 / P5WS0, is built around the Intel Sandy Bridge processor in an rPGA989 socket paired with the Intel Cougar Point-M PCH. Graphics are handled by an Nvidia N12P GS/GV discrete GPU. The system memory architecture consists of two 204-pin DDRIII SO-DIMM slots supporting DDRIII 1066/1333. The embedded controller is an ENE KB930, and the audio codec is an ALC271X/277X. A single SPI ROM is used for BIOS storage. Networking and card reader functions are integrated into a single BCM57785 controller. A NEC uPD720200AF1 USB hub IC provides USB 3.0 connectivity. The board is identified by the LA-6901P board number and is at revision 0.5, dated 2010-11-1.
Technician FAQ
Q: What is the board number for this Compal motherboard?
A: The board number is LA-6901P.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What is the CPU platform and socket type?
A: The CPU platform is Intel Sandy Bridge, using an rPGA989 socket.
Q: What is the discrete GPU model on this motherboard?
A: The discrete GPU is an Nvidia N12P GS/GV.
Q: What memory architecture does this board support?
A: It supports DDRIII 1066/1333 memory via two 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
acer=1=compal la-6901p je50-hr sjv50-hr_p5we0 p5ws0_rev0.5.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | JE50-HR / SJV50-HR |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | P5WE0 / P5WS0 |
| Board Number | LA-6901P |
| Revision | 0.5 |
| Date | 2010-11-1 |
| CPU Platform | Intel Sandy Bridge |
| CPU Socket | rPGA989 |
| PCH / Southbridge | Intel Cougar Point-M |
| GPU Type | Nvidia N12P GS/GV |
| EC / KBC | ENE KB930 |
| Audio Codec | ALC271X/277X |
| BIOS / SPI Flash | SPI ROM x1 |
| RAM Type | DDRIII |
| RAM Architecture | DDRIII 1066/1333 |
| RAM Quantity / Slots | 204pin DDRIII-SO-DIMM X2 |
| LAN IC | BCM57785 |
| Card Reader IC | BCM57785 |
| USB Hub IC | NEC uPD720200AF1 |
Technical Summary
This Compal JE50-HR / SJV50-HR motherboard, project codes P5WE0 / P5WS0, is built around the Intel Sandy Bridge processor in an rPGA989 socket paired with the Intel Cougar Point-M PCH. Graphics are handled by an Nvidia N12P GS/GV discrete GPU. The system memory architecture consists of two 204-pin DDRIII SO-DIMM slots supporting DDRIII 1066/1333. The embedded controller is an ENE KB930, and the audio codec is an ALC271X/277X. A single SPI ROM is used for BIOS storage. Networking and card reader functions are integrated into a single BCM57785 controller. A NEC uPD720200AF1 USB hub IC provides USB 3.0 connectivity. The board is identified by the LA-6901P board number and is at revision 0.5, dated 2010-11-1.
Technician FAQ
Q: What is the board number for this Compal motherboard?
A: The board number is LA-6901P.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930.
Q: What is the CPU platform and socket type?
A: The CPU platform is Intel Sandy Bridge, using an rPGA989 socket.
Q: What is the discrete GPU model on this motherboard?
A: The discrete GPU is an Nvidia N12P GS/GV.
Q: What memory architecture does this board support?
A: It supports DDRIII 1066/1333 memory via two 204-pin SO-DIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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