gateway nv53 wistron sjv50-pu_rev1.0 schematic
gateway nv53=1=wistron sjv50-pu_rev1.0.pdf
Technical Specifications
Technical Summary
The Wistron SJV50-PU motherboard (Project Code 91.4BX01.001, Board Number 48.4BX04.011, Revision 08260-1) is built around the AMD Giffin CPU S1G2 (35W) platform in a 638-Pin uFCPGA638 package, paired with an AMD RS780M North Bridge featuring integrated graphics and an AMD SB700 Southbridge. The discrete GPU is an M92-M2 with 64Mbx16x4 Video RAM on board. System memory consists of two DDR2 SODIMM slots supporting DDR II 533/667. The embedded controller is a Winbond WPC773L, and the BIOS SPI flash is a W25X80-V. Audio is handled by a CX20561 codec, networking by a BCM5764/5784 LAN controller, and storage card reading by an RTS5159 controller. The charging circuit is managed by a Battery Charger SAD+BAT+.
Technician FAQ
Q: What BIOS IC model is used on this motherboard?
A: The BIOS SPI flash is a W25X80-V.
Q: What EC/KBC controller is used on this motherboard?
A: The embedded controller is a Winbond WPC773L.
Q: What is the CPU platform and socket type?
A: The CPU platform is AMD Giffin CPU S1G2 (35W) using a 638-Pin uFCPGA638 socket.
Q: What is the discrete GPU configuration?
A: The discrete GPU is an M92-M2 with 64Mbx16x4 Video RAM soldered on board.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
gateway nv53=1=wistron sjv50-pu_rev1.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Wistron |
| Model | SJV50-PU |
| Motherboard Manufacturer | Wistron Incorporated |
| Project Code | 91.4BX01.001 |
| Board Number | 48.4BX04.011 |
| Revision | 08260-1 |
| Date | Wednesday, February 25, 2009 |
| CPU Platform | AMD Giffin CPU S1G2 (35W) 638-Pin uFCPGA638 |
| PCH / Southbridge | AMD SB700 |
| GPU Type | M92-M2 64Mbx16x4 Video RAM GPU ON BOARD |
| Graphics Architecture | AMD RS780M North Bridge INTEGRATED GRAHPICS |
| EC / KBC | WPC773L Winbond |
| Audio Codec | CX20561 |
| BIOS / SPI Flash | W25X80-V |
| Charging IC | Battery Charger SAD+BAT+ |
| RAM Type | DDR2 SODIMM |
| RAM Architecture | DDR II 533/667 |
| RAM Quantity / Slots | 2 |
| Card Reader IC | RTS5159 |
| LAN IC | BCM5764/5784 |
| WiFi / WLAN IC | 802.11a/b/g/n Mini Card |
Technical Summary
The Wistron SJV50-PU motherboard (Project Code 91.4BX01.001, Board Number 48.4BX04.011, Revision 08260-1) is built around the AMD Giffin CPU S1G2 (35W) platform in a 638-Pin uFCPGA638 package, paired with an AMD RS780M North Bridge featuring integrated graphics and an AMD SB700 Southbridge. The discrete GPU is an M92-M2 with 64Mbx16x4 Video RAM on board. System memory consists of two DDR2 SODIMM slots supporting DDR II 533/667. The embedded controller is a Winbond WPC773L, and the BIOS SPI flash is a W25X80-V. Audio is handled by a CX20561 codec, networking by a BCM5764/5784 LAN controller, and storage card reading by an RTS5159 controller. The charging circuit is managed by a Battery Charger SAD+BAT+.
Technician FAQ
Q: What BIOS IC model is used on this motherboard?
A: The BIOS SPI flash is a W25X80-V.
Q: What EC/KBC controller is used on this motherboard?
A: The embedded controller is a Winbond WPC773L.
Q: What is the CPU platform and socket type?
A: The CPU platform is AMD Giffin CPU S1G2 (35W) using a 638-Pin uFCPGA638 socket.
Q: What is the discrete GPU configuration?
A: The discrete GPU is an M92-M2 with 64Mbx16x4 Video RAM soldered on board.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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