Reputation:
acer gateway sjv50-cp mb 09284-1m
Technical Specifications
Technical Summary
The Wistron SJV50-CP motherboard, documented under project code SJV50-CP and board number SJV50, is designed for Intel Clarksfield and Arrandale CPU platforms paired with an Intel PCH. The board revision is 09284-SB, with a PCB part number of 48.4GH01.0SB. Graphics are handled by an ATI PCI Express Graphics solution. System management is provided by an NPCE781B EC/KBC, while audio is managed by an ALC272 codec. The BIOS is stored on a 128KB Flash ROM. Power management is handled by a combination of ICs including ISL62881, ISL62882, TPS51117, TPS51123, RT9025, and G2997, with charging controlled by an ISL88731A. Memory support includes DDRIII at 800/1066/1333 MHz and DDRII across two channels with two slots. Networking is provided by a BCM57780 Giga LAN controller. The system clock is generated by an ICS9LRS3197AKLF clock generator, and thermal monitoring is handled by a G78738 sensor.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The motherboard uses an NPCE781B EC/KBC.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 128KB Flash ROM, accessible via the SPI bus.
Q: What charging IC is used?
A: The charging IC is an ISL88731A.
Q: What is the memory architecture?
A: The board supports DDRIII 800/1066/1333 and DDRII memory across two channels (Channel A and Channel B) with two slots (Slot 0 and Slot 1).
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Wistron Corporation |
| Project Code | SJV50-CP |
| Board Number | SJV50 |
| Revision | 09284-SB |
| Date | Wednesday, October 21, 2009 |
| Document Number | A3167 |
| CPU Platform | Intel Clarksfield/Arrandale |
| PCH / Southbridge | Intel PCH |
| GPU Type | ATI |
| Graphics Architecture | PCI Express Graphics |
| EC / KBC | NPCE781B |
| Audio Codec | ALC272 |
| BIOS / SPI Flash | 128KB Flash ROM |
| Charging IC | ISL88731A |
| Power IC(s) | ISL62881, ISL62882, TPS51117, TPS51123, RT9025, G2997 |
| RAM Type | DDRIII 800/1066/1333, DDRII |
| RAM Architecture | Channel A, Channel B |
| RAM Quantity / Slots | Slot 0, Slot 1 |
| LAN IC | BCM57780 |
| WiFi / WLAN IC | WLAN |
| Card Reader IC | Card Reader |
| Thermal Sensor | G78738 |
| Clock Generator | ICS9LRS3197AKLF |
| PCB P/N | 48.4GH01.0SB |
Technical Summary
The Wistron SJV50-CP motherboard, documented under project code SJV50-CP and board number SJV50, is designed for Intel Clarksfield and Arrandale CPU platforms paired with an Intel PCH. The board revision is 09284-SB, with a PCB part number of 48.4GH01.0SB. Graphics are handled by an ATI PCI Express Graphics solution. System management is provided by an NPCE781B EC/KBC, while audio is managed by an ALC272 codec. The BIOS is stored on a 128KB Flash ROM. Power management is handled by a combination of ICs including ISL62881, ISL62882, TPS51117, TPS51123, RT9025, and G2997, with charging controlled by an ISL88731A. Memory support includes DDRIII at 800/1066/1333 MHz and DDRII across two channels with two slots. Networking is provided by a BCM57780 Giga LAN controller. The system clock is generated by an ICS9LRS3197AKLF clock generator, and thermal monitoring is handled by a G78738 sensor.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The motherboard uses an NPCE781B EC/KBC.
Q: What is the BIOS flash configuration?
A: The BIOS is stored on a 128KB Flash ROM, accessible via the SPI bus.
Q: What charging IC is used?
A: The charging IC is an ISL88731A.
Q: What is the memory architecture?
A: The board supports DDRIII 800/1066/1333 and DDRII memory across two channels (Channel A and Channel B) with two slots (Slot 0 and Slot 1).
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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