hp nc6000 inventec diamond dm10-6050a0032501-mb schematic
hp nc6000=1=inventec diamond dm10-6050a0032501-mb.pdf
Technical Specifications
Technical Summary
The INVENTEC DIAMOND A3 (Project Code PC8803, Revision A02) motherboard is built around the BANIAS (Micro-FCPGA) CPU platform with an ICH4-M southbridge. Graphics are handled by an ATI_M9-X chipset connected via an AGP 4X/8X bus at 66MHz. The system uses DDR SDRAM memory in two DDR_SODIMM slots. The embedded controller and keyboard controller functions are managed by a 47N227 device, which also integrates the Super I/O functionality (Kahuna Lite). Audio is provided by an AD_1981 AC97 codec. Networking is supported by a BCM 5705 Gigabit LAN controller. The charging subsystem is built around a MAX1772EEI (QSOP-28) IC, configurable for either 12.6V (2.5A charge) or 16.8V (3.3A adapter) operation. A CK 408 clock generator provides system timing, and an O2_711M3 controller manages the CardBus interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is PC8803, with project code PC8803 and revision A02.
Q: What EC/KBC and Super I/O controller is used?
A: The EC/KBC and Super I/O controller is a 47N227 (Kahuna Lite).
Q: What charging IC and architecture does this board use?
A: The charging IC is a MAX1772EEI (QSOP-28 package). The charger supports two configurations: CELLSEL=1 for 12.6V charge voltage at 2.5A, and CELLSEL=0 for 16.8V adapter voltage at 3.3A.
Q: What type of memory and how many slots are supported?
A: The board supports DDR SDRAM in two DDR_SODIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
hp nc6000=1=inventec diamond dm10-6050a0032501-mb.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | INVENTEC |
| Model | DIAMOND A3 |
| Motherboard Manufacturer | INVENTEC |
| Project Code | PC8803 |
| Board Number | PC8803 |
| Revision | A02 |
| Date | Thursday, August 21, 2003 |
| CPU Platform | BANIAS (Micro-FCPGA) |
| PCH / Southbridge | ICH4-M |
| GPU Type | ATI_M9-X |
| Graphics Architecture | AGP 4X/8X_BUS, 66MHz |
| EC / KBC | 47N227 |
| Audio Codec | AD_1981 |
| Charging IC | MAX_MAX1772EEI_QSOP_28 |
| Charger Architecture | CELLSEL=1, Vcharger=12.6V, Icharger=2.5A; CELLSEL=0, Vcharger=16.8V, Iadp=3.3A |
| RAM Type | DDR SDRAM |
| RAM Architecture | DDR _SODIMM0, DDR _SODIMM1 |
| RAM Quantity / Slots | 2 |
| LAN IC | BCM 5705 |
| Card Reader IC | O2_711M3 |
| Super I/O | 47N227 Kahuna Lite |
| Clock Generator | CK 408 |
| Thermal & Fan Controller | 20- THERMAL&FAN CONTROLLER |
Technical Summary
The INVENTEC DIAMOND A3 (Project Code PC8803, Revision A02) motherboard is built around the BANIAS (Micro-FCPGA) CPU platform with an ICH4-M southbridge. Graphics are handled by an ATI_M9-X chipset connected via an AGP 4X/8X bus at 66MHz. The system uses DDR SDRAM memory in two DDR_SODIMM slots. The embedded controller and keyboard controller functions are managed by a 47N227 device, which also integrates the Super I/O functionality (Kahuna Lite). Audio is provided by an AD_1981 AC97 codec. Networking is supported by a BCM 5705 Gigabit LAN controller. The charging subsystem is built around a MAX1772EEI (QSOP-28) IC, configurable for either 12.6V (2.5A charge) or 16.8V (3.3A adapter) operation. A CK 408 clock generator provides system timing, and an O2_711M3 controller manages the CardBus interface.
Technician FAQ
Q: What is the board number and project code for this motherboard?
A: The board number is PC8803, with project code PC8803 and revision A02.
Q: What EC/KBC and Super I/O controller is used?
A: The EC/KBC and Super I/O controller is a 47N227 (Kahuna Lite).
Q: What charging IC and architecture does this board use?
A: The charging IC is a MAX1772EEI (QSOP-28 package). The charger supports two configurations: CELLSEL=1 for 12.6V charge voltage at 2.5A, and CELLSEL=0 for 16.8V adapter voltage at 3.3A.
Q: What type of memory and how many slots are supported?
A: The board supports DDR SDRAM in two DDR_SODIMM slots.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
Last edited:
