Schematic hp pavilion dv4 inventec kitty14l uma-6050a2424501-mv build schematic

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hp pavilion dv4 inventec kitty14l uma-6050a2424501-mv build schematic

hp pavilion dv4=1=inventec kitty14l uma-6050a2424501-mv build.pdf




Technical Specifications

ParameterValue
BrandInventec
ModelKitty UMA
Motherboard ManufacturerInventec
Project CodeKitty
Board Number6050A2424501
RevisionA02
Date2010-12-01
CPU PlatformHuron River Platform
CPU ModelSandy Bridge
CPU SocketSocket-rPGA989
PCH / SouthbridgeCougar Point
GPU TypeUMA
EC / KBCITE IT8572E
Audio CodecIDT 92HD80
BIOS / SPI Flash4MB BIOS
Charging ICTI BQ24726
RAM TypeDDR3
RAM ArchitectureSO-DIMM
RAM Quantity / Slots2
Card Reader ICJMB709
LAN ICAR8151_BL1A
WiFi / WLAN ICWLAN + BT
Thermal SensorTI TMP431A
Document Number1310A24245-0-MTR

Technical Summary

The Inventec Kitty UMA motherboard, board number 6050A2424501 revision A02, is built on the Huron River Platform supporting a Sandy Bridge CPU in an rPGA989 socket with a Cougar Point PCH. The system uses integrated UMA graphics and features two DDR3 SO-DIMM slots for memory expansion. The embedded controller is an ITE IT8572E, and the audio codec is an IDT 92HD80. A 4MB SPI ROM is used for BIOS storage. The charging circuit is managed by a TI BQ24726 IC. Networking is provided by an Atheros AR8151_BL1A LAN controller and a combined WLAN + Bluetooth module. The system includes a JMB709 card reader controller and a TI TMP431A thermal sensor. The document number is 1310A24245-0-MTR.

Technician FAQ

Q: What is the board number and revision of this motherboard?

A: The board number is 6050A2424501, revision A02.

Q: What CPU platform and socket does this motherboard use?

A: It uses the Huron River Platform with a Sandy Bridge CPU in an rPGA989 socket.

Q: What EC/KBC is used on this motherboard?

A: The EC/KBC is an ITE IT8572E.

Q: What is the BIOS flash configuration?

A: The BIOS is a 4MB SPI ROM.

Q: What charging IC is used?

A: The charging IC is a TI BQ24726.

Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
 

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