lenovo 3000 g430 la-4211p_rev2.0 schematic
lenovo 3000 g430=1=la-4211p_rev2.0.pdf
Technical Specifications
Technical Summary
This Compal LA-4211P motherboard schematic, revision 2.0, is designed for the Mobile Penryn uFCPGA-478 CPU platform with an Intel Cantiga GMCH and ICH9-M southbridge. Graphics are handled by an nVIDIA NB9M GPU with dedicated VRAM. The system memory architecture consists of dual-channel DDR2-667 (1.8V) across two DDR2-SO-DIMM slots. The embedded controller is an ENE KB926, and audio is managed by a CX20561 codec. Networking is provided by a BCM5906 10/100 LAN controller, and a JMB385 card reader supports MMC/MS/MS-Pro/XD/SD formats. The charging IC is an SLG8SP556VTR, and the clock generator is an ICS9LPRS387AKLF. The BIOS is configured with three banks (0, 1, 2, 3) and is connected via the LPC bus.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB926.
Q: What audio codec is used on this motherboard?
A: The audio codec is a CX20561.
Q: What is the memory architecture of this motherboard?
A: The memory architecture is dual-channel DDR2-667 (1.8V) with two DDR2-SO-DIMM slots.
Q: What LAN controller is used on this motherboard?
A: The LAN controller is a BCM5906 10/100/LAN.
Q: What card reader controller is used on this motherboard?
A: The card reader controller is a JMB385.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
lenovo 3000 g430=1=la-4211p_rev2.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Document Number | 401557IS |
| Board Number | LA-4211P |
| Revision | 2.0 |
| Date | Saturday, June 06, 2009 |
| CPU Platform | Mobile Penryn uFCPGA-478 CPU |
| PCH / Southbridge | Intel ICH9-M |
| GPU Type | nVIDIA NB9M |
| Audio Codec | CX20561 |
| EC / KBC | ENE KB926 |
| LAN IC | BCM5906 10/100/LAN |
| Card Reader IC | JMB385 |
| RAM Type | DDR2 |
| RAM Architecture | Dual Channel |
| RAM Quantity / Slots | DDR2-SO-DIMM X2 |
| Charging IC | SLG8SP556VTR |
| Clock Generator | ICS9LPRS387AKLF |
Technical Summary
This Compal LA-4211P motherboard schematic, revision 2.0, is designed for the Mobile Penryn uFCPGA-478 CPU platform with an Intel Cantiga GMCH and ICH9-M southbridge. Graphics are handled by an nVIDIA NB9M GPU with dedicated VRAM. The system memory architecture consists of dual-channel DDR2-667 (1.8V) across two DDR2-SO-DIMM slots. The embedded controller is an ENE KB926, and audio is managed by a CX20561 codec. Networking is provided by a BCM5906 10/100 LAN controller, and a JMB385 card reader supports MMC/MS/MS-Pro/XD/SD formats. The charging IC is an SLG8SP556VTR, and the clock generator is an ICS9LPRS387AKLF. The BIOS is configured with three banks (0, 1, 2, 3) and is connected via the LPC bus.
Technician FAQ
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB926.
Q: What audio codec is used on this motherboard?
A: The audio codec is a CX20561.
Q: What is the memory architecture of this motherboard?
A: The memory architecture is dual-channel DDR2-667 (1.8V) with two DDR2-SO-DIMM slots.
Q: What LAN controller is used on this motherboard?
A: The LAN controller is a BCM5906 10/100/LAN.
Q: What card reader controller is used on this motherboard?
A: The card reader controller is a JMB385.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
Last edited:
