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Lenovo Quanta S06 AGILENT 3070 Schematic
Technical Specifications
Technical Summary
This document is the AMIBIOS8 Check Point and Beep Code List, version 1.2, last updated 1 October 2002. It covers AMIBIOS products released before May 2002, based on AMIBIOS8 Core 8.00.04. The document defines checkpoints output to I/O port 80h during bootblock and Power-On Self Test (POST) execution, as well as beep codes for fatal errors occurring before video initialization. Checkpoints are viewed using a POST diagnostic card (ISA or PCI) that displays the I/O port 80h value. The document includes sections for bootblock initialization checkpoints, bootblock recovery checkpoints, POST code checkpoints, DIM code checkpoints, ACPI runtime checkpoints, and beep code troubleshooting. It is a generic core reference and does not include chipset or board-specific checkpoint definitions.
Technician FAQ
Q: What I/O port is used for AMIBIOS8 checkpoint output?
A: AMIBIOS8 outputs checkpoints to I/O port 80h.
Q: What tool is required to view AMIBIOS8 checkpoints?
A: A POST diagnostic card (ISA or PCI add-in card) that displays the value of I/O port 80h on an LED display is required.
Q: What AMIBIOS core version does this document cover?
A: This document covers AMIBIOS8 Core 8.00.04 and AMIBIOS products released before May 2002.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
Technical Summary
This Quanta S06 motherboard schematic, dated June 26, 2004, details a platform built around an LGA775 Prescott/Tejas processor and a Copper River MCH paired with an ICH6R southbridge. The system supports DDR2 memory via four Unbuffered DIMM slots. Key onboard controllers include a PC8374K Super I/O, a BCM5721 LAN IC, and an ICS954101 clock generator. The BIOS is stored on a Firmware Hub (FWH) ROM, and the board also features an H8 BMC for management functions.
Technician FAQ
Q: What is the project code and board manufacturer for this motherboard?
A: The project code is S06, manufactured by Quanta.
Q: What CPU socket and platform does this motherboard support?
A: It supports an LGA775 Prescott/Tejas processor.
Q: What type of memory is used and how many slots are available?
A: The board uses DDR2 Unbuffered DIMMs across four slots.
Q: What LAN controller is integrated on this motherboard?
A: The board uses a Broadcom BCM5721 LAN IC.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | AMI (American Megatrends Inc.) |
| Document Title | AMIBIOS8 Check Point and Beep Code List |
| Document Version | 1.2 |
| Last Updated | 1 October 2002 |
| BIOS Core Version | AMIBIOS8 Core 8.00.04 |
| Checkpoint Port | I/O port 80h |
Technical Summary
This document is the AMIBIOS8 Check Point and Beep Code List, version 1.2, last updated 1 October 2002. It covers AMIBIOS products released before May 2002, based on AMIBIOS8 Core 8.00.04. The document defines checkpoints output to I/O port 80h during bootblock and Power-On Self Test (POST) execution, as well as beep codes for fatal errors occurring before video initialization. Checkpoints are viewed using a POST diagnostic card (ISA or PCI) that displays the I/O port 80h value. The document includes sections for bootblock initialization checkpoints, bootblock recovery checkpoints, POST code checkpoints, DIM code checkpoints, ACPI runtime checkpoints, and beep code troubleshooting. It is a generic core reference and does not include chipset or board-specific checkpoint definitions.
Technician FAQ
Q: What I/O port is used for AMIBIOS8 checkpoint output?
A: AMIBIOS8 outputs checkpoints to I/O port 80h.
Q: What tool is required to view AMIBIOS8 checkpoints?
A: A POST diagnostic card (ISA or PCI add-in card) that displays the value of I/O port 80h on an LED display is required.
Q: What AMIBIOS core version does this document cover?
A: This document covers AMIBIOS8 Core 8.00.04 and AMIBIOS products released before May 2002.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta |
| Project Code | S06 |
| Date | Saturday, June 26, 2004 |
| CPU Platform | Prescott/Tejas Processor LGA775 |
| PCH / Southbridge | ICH6R |
| MCH / Northbridge | Copper River |
| Super I/O | PC8374K |
| Super I/O | PC8374KF |
| Super I/O | PC8374K |
| LAN IC | BCM5721 |
| Clock Generator | ICS954101 |
| RAM Type | DDR2 |
| RAM Architecture | Unbuffered DIMMs |
| RAM Quantity / Slots | DIMM*4 |
| FWH BIOS ROM | FWH ROM |
| BMC | H8 |
| BMC | BMC_H8 |
Technical Summary
This Quanta S06 motherboard schematic, dated June 26, 2004, details a platform built around an LGA775 Prescott/Tejas processor and a Copper River MCH paired with an ICH6R southbridge. The system supports DDR2 memory via four Unbuffered DIMM slots. Key onboard controllers include a PC8374K Super I/O, a BCM5721 LAN IC, and an ICS954101 clock generator. The BIOS is stored on a Firmware Hub (FWH) ROM, and the board also features an H8 BMC for management functions.
Technician FAQ
Q: What is the project code and board manufacturer for this motherboard?
A: The project code is S06, manufactured by Quanta.
Q: What CPU socket and platform does this motherboard support?
A: It supports an LGA775 Prescott/Tejas processor.
Q: What type of memory is used and how many slots are available?
A: The board uses DDR2 Unbuffered DIMMs across four slots.
Q: What LAN controller is integrated on this motherboard?
A: The board uses a Broadcom BCM5721 LAN IC.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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