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lenovo quanta sp1 ps-note ps1-rev-1a 1031c-1730-bom intel 1
Technical Specifications
Technical Summary
This Quanta PS1 project motherboard is built around the Intel Penryn SFF CPU platform in a 956P BGA package, paired with the Cantiga SFF northbridge and ICH9-M SFF southbridge. The system memory architecture consists of two DDRIII-SODIMM slots supporting DDRIII 1067 MT/s. Embedded controller functionality is handled by an IT8502E. Audio is managed by a Conexant codec, while wired networking is provided by a Realtek RTL8111DL gigabit LAN controller. A Realtek RTS5158/5159 controller manages the 4-in-1 card reader. The charging subsystem is built around an ISL88731A battery charger IC. Multiple power regulation ICs are employed, including the ISL6237IRZ-T, RT8152B, TPS51116, RT8204, and MAX8796GTJ+. Wireless connectivity is supported by an Atheros WLAN module. System timing is governed by a CK505 clock generator, and an accelerometer sensor is present for motion detection.
Technician FAQ
Q: What EC/KBC is used on this Quanta PS1 motherboard?
A: The embedded controller is an IT8502E.
Q: What is the memory architecture of this motherboard?
A: The motherboard uses two DDRIII-SODIMM slots supporting DDRIII 1067 MT/s memory.
Q: What charging IC is used on this motherboard?
A: The battery charger IC is an ISL88731A.
Q: What LAN controller is used on this motherboard?
A: The wired networking is handled by a Realtek RTL8111DL gigabit LAN controller.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta Computer Inc. |
| Project Code | PS1 |
| Date | Saturday, October 31, 2009 |
| CPU Platform | Penryn SFF |
| CPU Socket | 956P (BGA) |
| Northbridge | Cantiga SFF |
| Southbridge | ICH9-M SFF |
| EC / KBC | IT8502E |
| Audio Codec | Conexant |
| LAN IC | Realtek RTL8111DL |
| Card Reader IC | Realtek RTS5158/5159 |
| Charging IC | ISL88731A |
| Power IC(s) | ISL6237IRZ-T, RT8152B, TPS51116, RT8204, MAX8796GTJ+ |
| RAM Type | DDRIII |
| RAM Architecture | DDRIII-SODIMM |
| RAM Quantity / Slots | 2 |
| WiFi / WLAN IC | Atheros |
| Clock Generator | CK505 |
| Accelerometer Sensor | Accelerometer Sensor |
Technical Summary
This Quanta PS1 project motherboard is built around the Intel Penryn SFF CPU platform in a 956P BGA package, paired with the Cantiga SFF northbridge and ICH9-M SFF southbridge. The system memory architecture consists of two DDRIII-SODIMM slots supporting DDRIII 1067 MT/s. Embedded controller functionality is handled by an IT8502E. Audio is managed by a Conexant codec, while wired networking is provided by a Realtek RTL8111DL gigabit LAN controller. A Realtek RTS5158/5159 controller manages the 4-in-1 card reader. The charging subsystem is built around an ISL88731A battery charger IC. Multiple power regulation ICs are employed, including the ISL6237IRZ-T, RT8152B, TPS51116, RT8204, and MAX8796GTJ+. Wireless connectivity is supported by an Atheros WLAN module. System timing is governed by a CK505 clock generator, and an accelerometer sensor is present for motion detection.
Technician FAQ
Q: What EC/KBC is used on this Quanta PS1 motherboard?
A: The embedded controller is an IT8502E.
Q: What is the memory architecture of this motherboard?
A: The motherboard uses two DDRIII-SODIMM slots supporting DDRIII 1067 MT/s memory.
Q: What charging IC is used on this motherboard?
A: The battery charger IC is an ISL88731A.
Q: What LAN controller is used on this motherboard?
A: The wired networking is handled by a Realtek RTL8111DL gigabit LAN controller.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Attachments
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