Schematic otherbrand quanta bl6 ramp2 reva1a schematic

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otherbrand quanta_bl6_ramp2_reva1a schematic

otherbrand=1=quanta_bl6_ramp2_reva1a.pdf




Technical Specifications

ParameterValue
BrandQuanta Computer Inc.
Project CodeBL6
RevisionA1A1
DateThursday, April 15, 2010
CPU PlatformArrandale (UMA+VGA)
PCH / SouthbridgeIbex Peak-M
CPU SocketrPGA 989
RAM TypeDDR III
RAM ArchitectureDual Channel DDR III
RAM Quantity / SlotsDDRIII-SODIMM1, DDRIII-SODIMM2
Audio CodecALC
LAN ICGiga/10/100 Lan
Card Reader ICCardreader
Charging ICISL88731
Power IC(s)ISL82882C, RT8210B, UPI6116A, UP6163, UPI6111A, MAX8792A, RT8152C
Clock GeneratorSLG8LV595VTR

Technical Summary

This Quanta BL6 motherboard is built on the Arrandale (UMA+VGA) platform with an Ibex Peak-M PCH and an rPGA 989 CPU socket. The system memory architecture is Dual Channel DDR III, supporting two DDRIII-SODIMM slots at 800/1066/1333 MHz. The audio subsystem is managed by an ALC codec, and networking is provided by a Giga/10/100 LAN controller. The power delivery system is complex, utilizing multiple charging and power ICs including ISL88731, ISL82882C, RT8210B, UPI6116A, UP6163, UPI6111A, MAX8792A, and RT8152C. The clock generation is handled by an SLG8LV595VTR clock generator. The board also integrates a card reader controller and supports various interfaces including HDMI, VGA, LVDS, SATA, USB, and PCI-Express.

Technician FAQ

Q: What is the CPU platform and socket used on this motherboard?

A: The CPU platform is Arrandale (UMA+VGA) and the socket is rPGA 989.

Q: What is the memory architecture and configuration?

A: The memory architecture is Dual Channel DDR III with two DDRIII-SODIMM slots supporting 800/1066/1333 MHz.

Q: What charging and power management ICs are used?

A: The charging IC is ISL88731, and the power ICs include ISL82882C, RT8210B, UPI6116A, UP6163, UPI6111A, MAX8792A, and RT8152C.

Q: What clock generator IC is used on this board?

A: The clock generator IC is an SLG8LV595VTR.

Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
 

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