toshiba nb520 la-6859p rev1.0.pdf 1
Technical Specifications
Technical Summary
This Compal LA-6859P REV:1.0 schematic, dated 2011-11-07, documents the Cougar 2.0 platform based on the Intel Cedar Trail processor and Tiger Point PCH. The motherboard is powered by an Intel Cedarview 2 Core CPU running at 1.86GHz with a 6.5W TDP. System management is handled by an ENE KB930 E0 embedded controller. The board utilizes a 2MB SPI ROM for BIOS storage and supports 204-pin DDRIII SO-DIMM memory operating at 1.5V and 1066MHz. Audio is provided by an ALC269 HDA codec, while networking is handled by an RTL8105E 10/100 LAN controller. A dedicated RTL5137 card reader IC is present, and wireless connectivity is supported via a PCIe Mini Card WLAN + BT COMBO module.
Technician FAQ
Q: What is the board number and revision of this motherboard?
A: The board number is LA-6859P REV:1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930 E0.
Q: What is the BIOS flash configuration on this motherboard?
A: The board uses a 2MB SPI ROM for BIOS storage.
Q: What memory type and configuration does this motherboard support?
A: The motherboard supports 204-pin DDRIII SO-DIMM modules at 1.5V and 1066MHz.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | QBU00 |
| Board Number | LA-6859P |
| Revision | REV:1.0 |
| Date | 2011-11-07 |
| Document Number | 4019EGBSCHEAMTIC A6859 |
| CPU Platform | Intel Cedar Trail |
| Platform Alias | Cougar 2.0 |
| CPU Model | Intel Cedarview 2 Core 1.86GHz (6.5W) |
| PCH / Southbridge | Tiger Point |
| EC / KBC | ENE KB930 E0 |
| Audio Codec | ALC269 |
| BIOS / SPI Flash | SPI ROM 128KB |
| BIOS Flash Capacity | 2MB |
| RAM Type | DDRIII |
| RAM Architecture | 204pin DDRIII-SO-DIMM |
| RAM Quantity / Slots | 1.5V DDRIII 1066MHz |
| LAN IC | RTL8105E 10/100 LAN |
| Card Reader IC | RTL5137 |
| WiFi / WLAN IC | PCIeMini Card WLAN +BT COMBO |
Technical Summary
This Compal LA-6859P REV:1.0 schematic, dated 2011-11-07, documents the Cougar 2.0 platform based on the Intel Cedar Trail processor and Tiger Point PCH. The motherboard is powered by an Intel Cedarview 2 Core CPU running at 1.86GHz with a 6.5W TDP. System management is handled by an ENE KB930 E0 embedded controller. The board utilizes a 2MB SPI ROM for BIOS storage and supports 204-pin DDRIII SO-DIMM memory operating at 1.5V and 1066MHz. Audio is provided by an ALC269 HDA codec, while networking is handled by an RTL8105E 10/100 LAN controller. A dedicated RTL5137 card reader IC is present, and wireless connectivity is supported via a PCIe Mini Card WLAN + BT COMBO module.
Technician FAQ
Q: What is the board number and revision of this motherboard?
A: The board number is LA-6859P REV:1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930 E0.
Q: What is the BIOS flash configuration on this motherboard?
A: The board uses a 2MB SPI ROM for BIOS storage.
Q: What memory type and configuration does this motherboard support?
A: The motherboard supports 204-pin DDRIII SO-DIMM modules at 1.5V and 1066MHz.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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