dell latitude e5410 e5510 fonseca15 uma x01 1103-1 09276- sb 09226-sb rev-x01 1
Technical Specifications
Technical Summary
The Wistron Fonseca UMA motherboard, revision X01, dated November 3, 2009, is built around the Intel Ibex Peak-M platform with an rPGA988A socket for Mobile Arrandale CPUs and an Intel PCH HM55 southbridge. The board utilizes UMA graphics architecture. System memory consists of DDR III across two DIMM slots configured as Channel A and Channel B. The embedded controller is a MEC 5045 communicating via LPC, and the BIOS is stored on a 64Mb SPI flash. Power management is handled by a TI BQ24745 battery charger and multiple DC/DC converters including ADP3211, TPS51218, TPS51116, TPS51125, ISL62883, MAX17036, and RT9035. Audio is provided by an IDT92HD81 Azalia codec, networking by a BCM5761E LAN IC, and a R5U242 card reader controller is present. The board also includes a TPS2231MRGR USB hub IC and an EMC4022 thermal sensor.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The BIOS is stored on a 64Mb SPI flash.
Q: What EC/KBC is used and is it programmable?
A: The embedded controller is a MEC 5045, which communicates via LPC.
Q: What is the charging IC and architecture?
A: The charging IC is a TI BQ24745, configured as a battery charger.
Q: What is the memory architecture?
A: The board uses DDR III memory across two DIMM slots, configured as Channel A and Channel B.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Wistron Corporation |
| Model | Fonseca UMA |
| Motherboard Manufacturer | Wistron Corporation |
| Project Code | Fonseca UMA |
| Board Number | 48.?????.0 |
| Revision | X01 |
| Date | Tuesday, November 03, 2009 |
| CPU Platform | Intel Ibex Peak-M |
| CPU Socket | rPGA988A |
| CPU Model | Mobile Arrandale |
| PCH / Southbridge | Intel PCH HM55 |
| GPU Type | UMA |
| Graphics Architecture | UMA |
| EC / KBC | MEC 5045 |
| EC/KBC Programmable | LPC |
| Audio Codec | IDT92HD81 Azalia |
| BIOS / SPI Flash | SPI FLASH 64Mb |
| BIOS Flash Capacity | 64Mb |
| Charging IC | TI BQ24745 |
| Charger Architecture | BATTERY CHARGER |
| Power IC(s) | ADP3211, TPS51218, TPS51116, TPS51125, ISL62883, MAX17036, RT9035 |
| RAM Type | DDR III |
| RAM Architecture | Channel A, Channel B |
| RAM Quantity / Slots | DIMM1, DIMM2 |
| LAN IC | BCM5761E |
| WiFi / WLAN IC | WLAN Module |
| Card Reader IC | R5U242 |
| USB Hub IC | TPS2231MRGR |
| Thermal Sensor | EMC4022 |
| Document Number | 91.4GN01.001 |
Technical Summary
The Wistron Fonseca UMA motherboard, revision X01, dated November 3, 2009, is built around the Intel Ibex Peak-M platform with an rPGA988A socket for Mobile Arrandale CPUs and an Intel PCH HM55 southbridge. The board utilizes UMA graphics architecture. System memory consists of DDR III across two DIMM slots configured as Channel A and Channel B. The embedded controller is a MEC 5045 communicating via LPC, and the BIOS is stored on a 64Mb SPI flash. Power management is handled by a TI BQ24745 battery charger and multiple DC/DC converters including ADP3211, TPS51218, TPS51116, TPS51125, ISL62883, MAX17036, and RT9035. Audio is provided by an IDT92HD81 Azalia codec, networking by a BCM5761E LAN IC, and a R5U242 card reader controller is present. The board also includes a TPS2231MRGR USB hub IC and an EMC4022 thermal sensor.
Technician FAQ
Q: What is the BIOS flash configuration on this motherboard?
A: The BIOS is stored on a 64Mb SPI flash.
Q: What EC/KBC is used and is it programmable?
A: The embedded controller is a MEC 5045, which communicates via LPC.
Q: What is the charging IC and architecture?
A: The charging IC is a TI BQ24745, configured as a battery charger.
Q: What is the memory architecture?
A: The board uses DDR III memory across two DIMM slots, configured as Channel A and Channel B.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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