Reputation:
hp pavilion dv4000_ze2000 quanta_ct1_rev1a schematic
hp pavilion dv4000_ze2000=1=quanta_ct1_rev1a.pdf
Technical Specifications
Technical Summary
This Quanta CT1 motherboard is designed for the Intel Pentium-M processor in a 478-pin micro FC-PGA socket, paired with the Montara-GM northbridge (732 micro-FCBGA) featuring integrated VGA graphics and the ICH4-M southbridge. System memory consists of two DDR-SODIMM slots operating at 266MHz via a 2.5V interface. The embedded controller is a PC97551 in a TQFP 176 package, while the audio subsystem is handled by an ALC202 codec. Power management includes a MAX1907 CPU core regulator and a MAX1999 system power controller for 3V/5V rails, with battery charging managed by the MAX1907. Networking is provided by a Realtek 8100CL LAN controller, and clock generation is handled by a CY28346 or ICS950810 clock generator. The board features a 6-layer PCB stackup (TOP/GND/IN1/IN2/VCC/BOT) and includes a CardBus/IEEE 1394 controller, a 5-in-1 card reader (C20468-31 with C20493-010 controller), and a TPA0312 audio amplifier.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is a PC97551 in a TQFP 176 package.
Q: What is the charging architecture on this motherboard?
A: Battery charging is managed by the MAX1907 IC.
Q: What type of memory does this motherboard support?
A: It supports DDR-SODIMM memory with a 2.5V interface operating at 266MHz across two slots.
Q: What is the LAN controller on this motherboard?
A: The LAN controller is a Realtek 8100CL.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
hp pavilion dv4000_ze2000=1=quanta_ct1_rev1a.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Quanta Computer Inc. |
| Project Code | CT1 |
| Date | Wednesday, April 14, 2004 |
| CPU Platform | Pentium-M |
| CPU Socket | 478 pins (micro FC-PGA) |
| Northbridge | Montara-GM (732 micro-FCBGA) |
| Southbridge | ICH4-M |
| GPU Type | Integrated VGA Function (Montara-GM) |
| EC / KBC | PC97551 (TQFP 176) |
| Audio Codec | ALC202 |
| Clock Generator | CY28346 / ICS950810 |
| LAN IC | Realtek 8100CL |
| Charging IC | MAX1907 |
| Power IC(s) | MAX1999 |
| RAM Type | DDR-SODIMM |
| RAM Architecture | DDR I/F 2.5V, 266MHz |
| RAM Quantity / Slots | 2 (DDR-SODIMM1, DDR-SODIMM2) |
| Card Reader IC | C20468-31 |
| Card Reader Controller | C20493-010 |
| USB Hub IC | 7411 |
| Thermal Sensor | CPU Thermal Sensor |
| Amplifier | TPA0312 |
| PCB Layer Count | 6 |
| PCB Stackup | TOP / GND / IN1 / IN2 / VCC / BOT |
Technical Summary
This Quanta CT1 motherboard is designed for the Intel Pentium-M processor in a 478-pin micro FC-PGA socket, paired with the Montara-GM northbridge (732 micro-FCBGA) featuring integrated VGA graphics and the ICH4-M southbridge. System memory consists of two DDR-SODIMM slots operating at 266MHz via a 2.5V interface. The embedded controller is a PC97551 in a TQFP 176 package, while the audio subsystem is handled by an ALC202 codec. Power management includes a MAX1907 CPU core regulator and a MAX1999 system power controller for 3V/5V rails, with battery charging managed by the MAX1907. Networking is provided by a Realtek 8100CL LAN controller, and clock generation is handled by a CY28346 or ICS950810 clock generator. The board features a 6-layer PCB stackup (TOP/GND/IN1/IN2/VCC/BOT) and includes a CardBus/IEEE 1394 controller, a 5-in-1 card reader (C20468-31 with C20493-010 controller), and a TPA0312 audio amplifier.
Technician FAQ
Q: What is the EC/KBC used on this motherboard?
A: The embedded controller is a PC97551 in a TQFP 176 package.
Q: What is the charging architecture on this motherboard?
A: Battery charging is managed by the MAX1907 IC.
Q: What type of memory does this motherboard support?
A: It supports DDR-SODIMM memory with a 2.5V interface operating at 266MHz across two slots.
Q: What is the LAN controller on this motherboard?
A: The LAN controller is a Realtek 8100CL.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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