Schematic toshiba satellite l500-l505 compal la-5322p rev1.0 schematic

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toshiba satellite l500-l505 compal_la-5322p_rev1.0 schematic

toshiba satellite l500-l505=1=compal_la-5322p_rev1.0.pdf




Technical Specifications

ParameterValue
BrandCompal
ModelNSWAA/NTWAA
Motherboard ManufacturerCompal Electronics, Inc.
Project CodeLA-5322P
Board NumberLA-5322P
RevisionRev 1.0
Date2009-12-22
Document Number401717D
CPU PlatformIntel Arrandale / IBEX PEAK
EC / KBCENE KB926 D3
Audio CodecALC272
BIOS / SPI FlashSPI ROM
EC Flash / ROMEC ROM
LAN ICRTL8103EL-VB
Card Reader ICRTS5159EC
GPU TypeATI M92XTX, 64bit with 256M/512MB / ATI M96 Pro, 128bit with 512MB/1GB
Graphics ArchitectureATI M92XTX / ATI M96 Pro
Thermal SensorADM1032ARMZ-25
Charging ICAPL5607

Technical Summary

This Compal LA-5322P motherboard, documented under document number 401717D revision 1.0 dated 2009-12-22, is designed for the Intel Arrandale CPU platform paired with the Ibex Peak PCH. The system management is handled by an ENE KB926 D3 embedded controller with a dedicated EC ROM. The main BIOS is stored on a SPI ROM. Audio is provided by an ALC272 HDA codec, and networking is handled by an RTL8103EL-VB 10/100M LAN controller. Graphics options include either an ATI M92XTX with a 64-bit memory interface or an ATI M96 Pro with a 128-bit interface, both using DDR3 memory. The charging circuit is managed by an APL5607 IC, and thermal monitoring is performed by an ADM1032ARMZ-25 sensor. A RTS5159EC card reader controller is also integrated.

Technician FAQ

Q: What EC/KBC is used on this motherboard?

A: The motherboard uses an ENE KB926 D3 embedded controller with a dedicated EC ROM.

Q: What BIOS flash type is used?

A: The motherboard uses a SPI ROM for the main BIOS.

Q: What LAN controller is used?

A: The motherboard uses a Realtek RTL8103EL-VB 10/100M Ethernet controller.

Q: What are the available GPU configurations?

A: The motherboard supports either an ATI M92XTX with a 64-bit memory interface and 256MB/512MB DDR3, or an ATI M96 Pro with a 128-bit memory interface and 512MB/1GB DDR3.

Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
 

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