toshiba nb520 compal la-6858p qbu00 cougar 2.0 schematic
toshiba nb520=1=compal la-6858p qbu00 cougar 2.0.pdf
Technical Specifications
Technical Summary
This Compal LA-6858P REV:1.0 schematic, dated 2011-11-07, documents the Cougar 2.0 platform based on the Intel Cedar Trail processor and Tiger Point chipset. The motherboard is powered by an Intel Cedarview 2 Core 1.86GHz CPU and utilizes a Tiger Pointer PCH. System memory consists of one 204-pin DDRIII-SO-DIMM slot supporting 1.5V DDRIII 1066MHz modules. The embedded controller is an ENE KB930 E0, with a dedicated 128KB SPI ROM for EC firmware. The main BIOS is stored on a 2MB SPI ROM. Audio is handled by an ALC269 HDA codec, and networking is provided by an RTL8105E 10/100 LAN IC. Storage connectivity includes a SATA HDD port, and expansion is supported via PCIe Mini Card slots for WLAN+BT combo and WWAN modules. A card reader is integrated using the RTL5137 controller.
Technician FAQ
Q: What is the board number and revision of this motherboard?
A: The board number is LA-6858P, revision REV:1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930 E0.
Q: What is the BIOS flash configuration?
A: The main BIOS is stored on a 2MB SPI ROM, and the EC has a dedicated 128KB SPI ROM.
Q: What is the memory architecture?
A: The motherboard supports one 204-pin DDRIII-SO-DIMM slot running at 1.5V and 1066MHz.
Q: What LAN and audio controllers are used?
A: The LAN controller is an RTL8105E 10/100, and the audio codec is an ALC269.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
toshiba nb520=1=compal la-6858p qbu00 cougar 2.0.pdf
Technical Specifications
| Parameter | Value |
|---|---|
| Brand | Compal |
| Model | Cougar 2.0 |
| Motherboard Manufacturer | Compal Electronics, Inc. |
| Project Code | QBU00 |
| Board Number | LA-6858P |
| Revision | REV:1.0 |
| Date | 2011-11-07 |
| CPU Platform | Intel Cedar Trail |
| Platform Alias | Tiger Point |
| CPU Model | Intel Cedarview 2 Core 1.86GHz (6.5W) |
| PCH / Southbridge | Tiger Pointer |
| EC / KBC | ENE KB930 E0 |
| Audio Codec | ALC269 |
| BIOS / SPI Flash | SPI ROM 2MB |
| BIOS Flash Capacity | 2MB |
| EC Flash / ROM | SPI ROM 128KB |
| RAM Type | DDRIII |
| RAM Architecture | 204pin DDRIII-SO-DIMM |
| RAM Quantity / Slots | 1 |
| LAN IC | RTL8105E 10/100 LAN |
| Card Reader IC | RTL5137 |
| WiFi / WLAN IC | PCIeMini Card WLAN +BT COMBO |
Technical Summary
This Compal LA-6858P REV:1.0 schematic, dated 2011-11-07, documents the Cougar 2.0 platform based on the Intel Cedar Trail processor and Tiger Point chipset. The motherboard is powered by an Intel Cedarview 2 Core 1.86GHz CPU and utilizes a Tiger Pointer PCH. System memory consists of one 204-pin DDRIII-SO-DIMM slot supporting 1.5V DDRIII 1066MHz modules. The embedded controller is an ENE KB930 E0, with a dedicated 128KB SPI ROM for EC firmware. The main BIOS is stored on a 2MB SPI ROM. Audio is handled by an ALC269 HDA codec, and networking is provided by an RTL8105E 10/100 LAN IC. Storage connectivity includes a SATA HDD port, and expansion is supported via PCIe Mini Card slots for WLAN+BT combo and WWAN modules. A card reader is integrated using the RTL5137 controller.
Technician FAQ
Q: What is the board number and revision of this motherboard?
A: The board number is LA-6858P, revision REV:1.0.
Q: What EC/KBC is used on this motherboard?
A: The embedded controller is an ENE KB930 E0.
Q: What is the BIOS flash configuration?
A: The main BIOS is stored on a 2MB SPI ROM, and the EC has a dedicated 128KB SPI ROM.
Q: What is the memory architecture?
A: The motherboard supports one 204-pin DDRIII-SO-DIMM slot running at 1.5V and 1066MHz.
Q: What LAN and audio controllers are used?
A: The LAN controller is an RTL8105E 10/100, and the audio codec is an ALC269.
Technical data structured and organized by Dr-Bios.com, based on original schematic source analysis.
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